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CHAPTER 14 8-BIT SERIAL I/O
Figure 14.8-2 8-bit Serial I/O Operation in Stop Mode (Internal Shift Clock)
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8-bit serial I/O operation at issuance of stop request during operation
As shown in Figure 14.8-3 , if operation is stopped (SMR: SST = 0) during data transfer, the 8-bit serial I/O
stops data transfer and clears the shift clock counter. For this reason, the transfer destination must also be
initialized. If serial output is in operation, set the SDR again before restarting the 8-bit serial I/O.
Figure 14.8-3 8-bit Serial I/O Operation at Issuance of Stop Request during Operation(Internal Shift Clock)
#0
#1
#2
#4
#3
#5
#6
#7
SCK output
SST bit
Oscillation stabilization
wait time
Stop mode request
Clear via program
SIOF bit
Interrupt request
SO pin output
STP bit
(STBC register)
Stop mode
Stop mode release via external interrupt
#0
#1
#2
#4
#3
#5
#0
#1
SCK output
SST bit
Operation stop
Restart
SDR register resetting
SIOF bit
SO pin output
Содержание F2MC-8L F202RA
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Страница 32: ...16 CHAPTER 1 OVERVIEW ...
Страница 90: ...74 CHAPTER 3 CPU ...
Страница 142: ...126 CHAPTER 5 TIME BASE TIMER POPW A RETI ENDS END ...
Страница 150: ...134 CHAPTER 6 WATCHDOG TIMER ...
Страница 174: ...158 CHAPTER 7 8 BIT PWM TIMER User processing POPW A XCHW A T Restoring A and T POPW A RETI ENDS ...
Страница 176: ...160 CHAPTER 7 8 BIT PWM TIMER ...
Страница 220: ...204 CHAPTER 8 8 16 BIT CAPTURE TIMER COUNTER ...
Страница 240: ...224 CHAPTER 9 12 BIT PPG TIMER ...
Страница 258: ...242 CHAPTER 10 EXTERNAL INTERRUPT CIRCUIT 1 EDGE PUSHW A User processing POPW A XCHW A T POPW A RETI ENDS END ...
Страница 274: ...258 CHAPTER 11 EXTERNAL INTERRUPT CIRCUIT 2 LEVEL ...
Страница 362: ...346 CHAPTER 15 BUZZER OUTPUT ...
Страница 371: ...355 CHAPTER 16 WILD REGISTER FUNCTION 16 3 5 Data Test Set Register WROR A test register Do not access this register ...
Страница 390: ...374 CHAPTER 17 FLASH MEMORY ...
Страница 419: ...403 INDEX INDEX The index follows on the next page This is listed in alphabetic order ...
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