MER<11:8>
This field indicates which byte or bytes had a parity error
during a memory read. When set to 1, MER<11> indicates that
memory data byte <31:24> is in error, MER<10> corresponds
to memory data byte <23:16>, and so on. These bits is set on
any memory access where an error occurred and remain set
until they are cleared by writing them to 0. MER<14> disables
loading this register via memory error.
MER<7:0>
These bits are reserved.
Memory Size Register (MSR)
The memory size register programs the size of memory used.
Table E-13. Memory Size Register 0x0C800000
Bits
Access
Description
31:14
Reserved
13
R/W
Size
12:0
Reserved
MSR<31:14>
These bits are reserved.
MSR<13>
SIZE is set to 0 when it is reset causing the use of 4-Mbyte
banks. If SIZE is set to 1 the memory can use 16-Mbyte banks.
Different-sized memory SIMMs, when mixed in a system do not
provide optimal storage space.
MSR<12:0>
These bits are reserved.
E–30
CPU and System Registers
Содержание DECstation 5000/100 Series
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