Digital Equipment DECstation 5000/100 Series, Руководство по обслуживанию

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SIR<27>
This interrupt is generated by the communication port 2
transmit DMA logic. The DMA transmitter, when enabled
transmits bytes until the pointer reaches a page boundary. At
this point it stops DMA and interrupts the processor. DMA is
disabled whenever this bit is set. Clear this bit by writing 0;
writing 1 has no effect. Clearing this bit may restart the DMA
if the DMA enable bit is still on.
SIR<26>
When a parity error, page crossing error, or maximum transfer
length error occurs during a communication transmit port 2
DMA, this bit is set and the DMA is disabled. The DMA pointer
will contain the error address. Check the memory sections for
more information. To restart, software must clear this bit by
writing 0; writing 1 has no effect.
SIR<25>
When the receive DMA pointer associated with communication
port 2 reaches a (2-Kbyte) half-page boundary, this bit is set.
Software must disable DMA, load a new pointer, and restart
DMA quickly. Clear this bit by writing 0. Writing 1 has no
effect. This bit will always be set when bit 24 is set. The value
of this bit is informational only and does not stop the DMA.
SIR<24>
When the receive DMA pointer associated with communication
port 2 reaches a page boundary, this bit is set and the DMA
disabled. To restart, clear this bit by writing 0; writing 1 has
no effect. Note that bit<25> is also set whenever this bit is set.
SIR<23:20>
These bits are reserved.
SIR<19>
This interrupt is set whenever the SCSI DMA buffer pointer
associated with the SCSI port is loaded into the SCSI DMA
pointer register. Software uses this interrupt to load a new
buffer pointer into the SCSI buffer pointer register. Clear this
interrupt by writing 0 to it.
E–24 CPU and System Registers