7
Backplane Jumpers and Upgrading PE Arrays
Chapter 7 explains the various DPU backplane jumpers and describes how to
add additional processor element (PE) array printed circuit boards (PCBs) for
increased system performance.
7.1 DPU Backplane Jumpers
To understand how to configure the backplane jumpers, you must understand the
slot arrangement in the card cage. The DPU card cage is divided into two regions
(Figure 7–1).
•
The array control unit (ACU), Front-end VME interface (MVIB), and I/O PCB
slots
•
The PE array/router PCB slots
The DECmpp 12000 backplane has two rows of card cage slots. The top row is
for I/O slots, and the bottom row is for PE array/router PCB slots. Looking at the
backplane slots from the DPU front, the ACU is in the upper-right I/O slot. The
second I/O slot from the right is always occupied by the Front-end VME interface
(MVIB). This is a T6000 VMEbus controller PCB mounted on a Parallel VME 6U
Adapter PCB. The balance of the I/O slots are reserved for the PVME controller
and I/O interface PCBs such as that used for the disk array.
The bottom row has 1, 2, 4, 8, or 16 PE array PCBs in contiguous locations
starting from the right and router PCBs in slots not containing PE array PCBs.
Note
When you are looking into the card cage, this view is reversed.
The DECmpp 12000–LC card cage has one row of 11 card cage slots. Looking at
the backplane slots from the DPU front and starting from the right, the first slot
is the ACU PCB slot, the second is the front-end VME interface PCB, the next
five are I/O slots, and the remaining four are PE array/router PCB slots.
The DECmpp 12000–LC can have 1, 2, or 4 PE array PCBs at contiguous
locations and router PCBs in slots not containing PE array PCBs.
Note
When you are looking into the card cage, this view is reversed.
Backplane Jumpers and Upgrading PE Arrays 7–1
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