
pe_macro(1)
The values returned in the error messages may be interpreted as follows:
*
Error message #1–#159: Each word is a global OR of the data
transferred to and from PMem by each PE. The sequence is:
step 1:
0x00 --> 0[c1]
step 2:
0x5a --> 8[c1]
step 3:
8[c1] --- st8 ---> PMem
0x5a
step 4:
0[c1] --- st8 ---> PMem
0x00
step 5:
0xff --> 0[c1]
step 6:
0xa5 --> 8[c1]
step 7:
? <-- 8[c1] <--- ld8 --- PMem
Each PE should get 0x00 back from PMem, but if the tag stall
mechanism is not working, some PEs may get 0x5a back instead:
•
0x5a: Tag stall mechanism is not working.
•
0xa5: The LD8 command in step #7 did not return data to
destination.
•
0xff: While the store command in step #4 is still working, step #5
changes the data in 0[c1]. The tag stall mechanism is supposed
to prevent this change from affecting the store command still in
progress.
*
Error message #160: Same as the previous words, except a different
addressing mode is used for the PReg address.
*
Error message #161: Sanity check to verify that the test can transmit
a number other than zero. If this word is zero, then the veracity of all
the previous words is suspect.
tagtest0f
: Tag Stall Test (Many PRegs To Many PMem Locations) —
Fast test of the PReg tag stall. The test performs the following sequence
of operations:
1.
It initializes PReg location A with 0x0, and PReg location B with
0x5a.
2.
It stores PReg loc B (0x5a) into a PMem location.
3.
It immediately stores PReg loc A (0x0) into the same PMem location.
4.
It immediately re-loads PReg loc A with 0xff. If 0xff is loaded into
some of the PMem locations, an error is indicated.
5.
It then attempts to load the PMem location into PReg B. If it gets
anything other than zero, it is an error.
The test repeats for many different offsets in both PReg and PMem.
If there is an error, the test ends immediately and prints an error message
giving the state of the zero flag, the base PMem address where the error
occurred, and the base PReg address where the error occurred. It gives no
clue as to which PE chip is faulty.
*
Error word 1: Expected 0x00000000. This word represents the
inverse of the zero flag. Thus, this word is zero if the flag was set
(the normal case). This word will be 0x00000001 if the flag was not
set (indicating that one or more PEs read a nonzero number from its
PMem).
Data Parallel Unit Reference Pages B–55
Содержание DECmpp 12000/Sx 100
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