pe_macro(1)
2
1
0
n
z
v
c
Overflow flag
Zero flag
Negative flag
bit
3
Carry flag
MPP_FIG_276
•
AndTests2
: Immediate To PReg AND Test (8, 16, 32 and 64 bit) — This test
performs 8-bit, 16-bit, 32-bit, and 64-bit AND operations.
After each AND, if it detects an error, the test prints an error message which
gives the AND the test was attempting, the expected answer and the actual
answer.
After each AND, it checks the flag bits. If any of these is in error, an error
message is printed giving the operation attempted, the expected flag bits and
the actual flag bits. The flag bits are collected as shown:
2
1
0
n
z
v
c
Overflow flag
Zero flag
Negative flag
bit
3
Carry flag
MPP_FIG_276
•
AndTests3
: 64 Bit AND Test — With all PEs enabled, this test performs eight
64-bit AND operations in immediate succession into eight adjacent PReg
locations. Then it checks each of these PReg locations for the correct answer.
One purpose of this test is to verify that AND64 operations into adjacent
PReg locations do not affect each other.
This test performs the following PReg to PReg operations:
0x21436587deadbeef & 0x21436587deadbeef –> 0x000[c0]
0x21436587deadbeef & 0x0000000000000000 –> 0x040[c0]
0x21436587deadbeef & 0xffffffffffffffff –> 0x080[c0]
0x21436587deadbeef & 0x1248124812481248 –> 0x0c0[c0]
0x21436587deadbeef & 0xedb7edb7edb7edb7 –> 0x100[c0]
It then performs the following IMMEDIATE to PReg operations:
0xffffffffffffffff & 0x1248124812481248 –> 0x140[c0]
0xffffffffffffffff & 0xedb7edb7edb7edb7 –> 0x180[c0]
0x0000000000000000 & 0xffffffffffffffff –> 0x1c0[c0]
After performing all of the above operations, keeping each answer in a
different PReg location, the test checks for errors. If it finds an error, it prints
an error message giving the attempted AND operation, the expected result
and the actual result.
Data Parallel Unit Reference Pages B–19
Содержание DECmpp 12000/Sx 100
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