Associated Research HypotMAX 7705, Руководство по эксплуатации и обслуживанию

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The Enable registers bits represent the selection of bits that will be logically-ORed
together to form the summary bit in the status byte. The *CLS command will not clear
the enable registers and if you wish to clear the register you must set it to a value of 0.
Like the event register, the enable register is represented as a decimal number that
equals the binary-weighted sum of all bits.
The enable register will clear to value of 0 at power up unless the *PSC 0 command
had been executed before power-off. The *PSC command tells the device whether or
not it should clear the enable registers at power-on. Using this command will allow
SRQs to function immediately after power-on.
STANDARD EVENT
REGISTER
STATUS BYTE REGISTER
Bit Binary
weight
Event Register Enable
Register Summary Register Enable
Register
0 1 Operation Complete ALL PASS
1 2 not used FAIL
2 4 Query Error ABORT
3 8 Device Error TEST IN PROCESS
4 16 Execution Error Message Available (MAV)
5 32 Command Error Event Summary Bit (ESB)
6 64 not used Request Service (RQS) or
Master Summary Status
(MSS)
not used
7 128 Power On not used
*ESR? *ESE *STB? | SPOLL *SRE
*ESE? *SRE?
7.4.9. GPIB Service Request
The service request capability is not available with the USB/RS-232 interface. The
SRQ line will be activated only after one or more of the service request functions have
been enabled using the Status Byte Enable Register command *SRE.
The status byte bit assignments are as described in the previous section for status
reporting. When the instrument has requested service, the enabled bit or bits and the
RQS bit 6 will be active or 1. Bit 4, 5, and 7 are not used and will be set to false, or 0
for all status byte reads.
After the serial poll (SPOLL) is executed the RQS bit will be cleared to 0, and the
remaining bits will remain unchanged. The status byte, ESB bit will not change value
until the event register is read and cleared for the corresponding status byte bit.
For example after the All Pass SRQ has been enabled, when the test(s) have finished
with pass indications the instrument will set the hardware SRQ line and output the