Instruction manual
–
AQ G3x7 Generator protection IED
166 (211
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Figure 3-99: The function block of the dead line detection function
The binary input and output status signals of the dead line detection function are listed in
tables below.
Binary status signal
Explanation
DLD_Blk_GrO_
Output status defined by the user to disable the dead line
detection function.
Table 3-73: The binary input signal of the dead line detection function
Binary output signals
Signal title
Explanation
DLD function
DLD_StUL1_GrI_
Start UL1
The voltage of phase L1 is above the setting
limit
DLD_StUL2_GrI_
Start UL2
The voltage of phase L2 is above the setting
limit
DLD_StUL3_GrI_
Start UL3
The voltage of phase L3 is above the setting
limit
DLD_StIL1_GrI_
Start IL1
The current of phase L1 is above the setting
limit
DLD_StIL2_GrI_
Start IL2
The current of phase L2 is above the setting
limit
DLD_StIL3_GrI_
Start IL3
The current of phase L3 is above the setting
limit
DLD_DeadLine_GrI_
DeadLine condition
The requirements of “DeadLine condition”
are fulfilled
DLD_LineOK_GrI_
LineOK condition
The requirements of “Live line condition”
(LineOK) are fulfilled
Table 3-74: The binary output status signals of the dead line detection function