
Date: March 29, 1996 Sheet 2 of 23
Size Document Number
REV
B
ElanSC300/310 Evaluation Board
2.2
Title
ElanSC300 Socket - 208 PIN PGA SOCKET
AMD Proprietary/All Rights Reserved
(800) 222-9323
Austin, Texas 78741
5204 E. Ben White Blvd.
(C) Advanced Micro Devices, Inc.
SMI
ACIN
PMC0
PMC1
PMC2
PMC4
PGPA
LPH#
JTAGEN
RESIN#
PMC3
RESUME#
SLF2
SLF3
SPKER
SLF1
SLF4
XIORESET#
14MOUT
P32KOUT
P32KINR
VCCEL1
GND
R380
10
OVCC3
VCCPELA
C231
33uF TANT
EIRQ1
EPIRQ1
L5
47uH
PIRQ0
DACK2#
ELPCLK
VCCEL5
VCCELSYS
VCCELMEM
VCCELSY2
ELPCLK
SYSCLK
R1
SA0
T7
SA1
U7
SA2
R7
SA3
U6
SA4
T6
SA5
P9
SA6
U5
SA7
P7
SA8
R6
SA9
U3
SA10
P8
SA11
T4
SA12
R5
D0
M3
D1
P1
D2
N2
D3
N1
D4
M2
D5
M1
D6
L3
D7
L2
D8
K3
D9
K1
D10
K2
D11
J1
D12
J3
D13
J2
D14
H2
D15
K4
M
A
0
/
S
A
1
4
H
3
M
A
1
/
S
A
1
5
G
1
M
A
2
/
S
A
1
6
F
1
M
A
3
/
S
A
1
7
F
2
M
A
4
/
S
A
1
8
J
4
M
A
5
/
S
A
1
9
E
2
M
A
6
/
S
A
2
0
E
1
M
A
7
/
S
A
2
1
G
4
M
A
8
/
S
A
2
2
D
1
M
A
9
/
S
A
2
3
C
1
M
A
1
0
/
S
A
1
3
H
4
CAS1H#(SRCS1#)
C2
CAS1L#(SRCS0#)
D3
CAS0H#(SRCS3#)
B1
CAS0L#(SRCS2#)
E4
MWE#
E3
RAS1#
A1
RAS0#
F4
IRQ1
A5
PIRQ0(IRQ3)
C7
PIRQ1(IRQ6)
A6
DACK2#(TCLK)
N3
DRQ2(TDO)
R8
AEN(TD)
R2
TC(TMS)
T1
SDWRTH
R3
SDWRTL
N4
IOR#
P6
IOW#
U1
MEMR#
P4
MEMW#
T3
DBUFOE#
U2
RSTDRV
R4
IOCHRDY
B7
A
C
I
N
U
1
6
E
X
T
S
M
I
#
R
1
4
R
E
S
U
M
E
#
R
1
5
P
M
C
0
G
1
7
P
M
C
1
G
1
6
P
M
C
2
T
9
P
M
C
3
A
9
P
G
P
0
A
7
P
G
P
1
B
8
P
G
P
2
A
8
P
G
P
3
B
9
BL1#
M14
BL2#
U17
BL3#
N14
BL4#
R16
L
P
H
#
C
8
G
N
D
B
2
G
N
D
P
1
4
G
N
D
B
1
6
G
N
D
T
1
6
G
N
D
J
1
4
G
N
D
D
6
G
N
D
D
1
2
G
N
D
G
3
G
N
D
L
1
G
N
D
T
2
G
N
D
T
5
SBHE(LCDDL1)
E17
IOCS16#(LCDDL0)
B6
MCS16#(LCDDL1)
A4
IRQ14(LCDDL1)
B5
L
V
D
D
#
(
B
A
L
E
)
D
1
7
L
V
E
E
#
(
I
R
Q
1
5
)
B
1
0
F
R
M
/
V
D
R
V
(
I
R
Q
1
2
)
D
7
C
P
1
/
H
D
R
V
(
P
R
E
Q
/
I
B
1
1
C
P
2
/
V
D
O
(
B
U
S
Y
#
/
I
A
1
1
M
(
I
R
Q
4
)
D
9
L
C
D
D
0
/
I
(
D
R
Q
1
)
B
1
2
L
C
D
D
1
/
R
(
D
A
C
K
5
#
)
F
1
6
L
C
D
D
2
/
G
(
D
R
Q
5
)
A
1
3
L
C
D
D
3
/
B
(
I
O
C
H
C
H
K
A
1
2
D
S
C
E
#
(
D
A
C
K
1
#
)
E
1
6
D
S
O
E
#
(
C
P
U
R
D
Y
#
/
L
D
1
6
D
S
W
E
#
(
P
U
L
L
U
P
)
A
1
0
D
S
M
A
0
B
1
4
D
S
M
A
1
(
N
A
#
/
I
R
Q
7
)
C
1
4
D
S
M
A
2
(
C
P
U
R
S
T
)
A
1
6
D
S
M
A
3
(
C
P
U
C
L
K
)
D
1
4
D
S
M
A
4
(
A
1
3
/
D
A
C
K
6
B
1
5
D
S
M
A
5
(
A
1
4
/
D
A
C
K
7
D
1
5
D
S
M
A
6
(
A
1
5
/
D
A
C
K
3
A
1
7
D
S
M
A
7
(
A
1
6
/
D
A
C
K
0
D
8
D
S
M
A
8
(
A
1
7
/
L
A
1
7
)
C
1
5
D
S
M
A
9
(
A
1
8
/
L
A
1
8
)
E
1
4
D
S
M
A
1
0
(
A
1
9
/
L
A
1
9
B
1
7
D
S
M
A
1
1
(
A
2
0
/
L
A
2
0
E
1
5
D
S
M
A
1
2
(
A
2
1
/
L
A
2
1
C
1
6
D
S
M
A
1
3
(
A
2
2
/
L
A
2
2
F
1
5
D
S
M
A
1
4
(
A
2
3
/
L
A
2
3
C
1
7
D
S
M
D
0
(
L
D
E
V
#
/
R
E
F
D
1
3
D
S
M
D
1
(
L
R
D
Y
#
/
D
R
Q
D
1
0
D
S
M
D
2
(
B
L
E
#
/
I
R
Q
1
A
1
5
D
S
M
D
3
(
B
H
E
#
/
I
R
Q
9
C
1
3
D
S
M
D
4
(
W
_
R
#
/
D
R
Q
7
A
1
4
D
S
M
D
5
(
M
_
I
O
/
D
R
Q
3
C
1
2
D
S
M
D
6
(
D
_
C
#
/
D
R
Q
0
D
1
1
D
S
M
D
7
(
A
D
S
#
/
0
W
S
#
B
1
3
DOSCS#
P2
ROMCS#
P5
A
2
0
G
A
T
E
P
1
0
R
C
#
T
8
8
0
4
2
C
S
#
U
8
RIN#
R13
SIN
T15
DCD#
R12
DSR#
U15
CTS#
P13
SOUT
T13
RTS#
U14
DTR#
P11
PPOEN#
U13
PPDWE#(PPDCS#)
T12
INIT#
U12
ACK#
R11
SLCTIN#
R10
ERROR#
T11
BUSY
U11
SLCT
P12
STRB#
U10
PE
T10
AFDT#
R9
CA25
H15
CA24
H16
BVD2-B
N17
BVD1-B
N16
WP-B
L14
RDY-B#
P17
CD-B#
M15
RST-B
K17
REG-B#
L16
VPP-B
L17
MCEL-B#
M17
MCEH-B#
L15
ICDIR
M16
WAIT-AB#
R17
BVD2-A
P16
BVD1-A
K14
WP-A
N15
RDY-A#
T17
CD-A#
P15
RST-A
J17
REG-A#
J15
VPP-A
H14
MCEL-A#
J16
MCEH-A#
K16
G
N
D
D
4
G
N
D
L
4
V
C
C
S
Y
S
P
3
V
C
C
S
Y
S
U
4
V
C
C
H
1
V
C
C
M
E
M
D
2
V
C
C
M
E
M
G
2
V
C
C
M
E
M
M
4
V
C
C
U
9
V
C
C
S
Y
S
2
G
1
5
V
C
C
5
T
1
4
V
C
C
H
1
7
V
C
C
1
C
1
1
V
C
C
5
K
1
5
V
C
C
C
1
0
A
V
C
C
B
3
S
P
K
R
F
1
4
X
I
O
R
E
S
E
T
#
G
1
4
L
F
4
C
3
1
4
M
O
U
T
(
B
A
U
D
O
U
T
)
D
5
X
3
2
I
N
A
3
X
3
2
O
U
T
C
6
L
F
1
C
5
L
F
2
A
2
L
F
3
C
4
R
E
S
I
N
#
F
1
7
J
T
A
G
E
N
B
4
G
N
D
F
3
P
M
C
4
C
9
U?
ELANPGA
VPP1
A20GATE
PGPD
PGPC
PGPB
1ICRST
8042CS#
RC#
MCE1#
MCE12#
REG1#
GND
VCCPELA
C12
0.01uF TANT
VCCEL5
GND
GND
GND
C167
0.1UF
C168
0.1UF
VCCPEL3
C166
0.01uF TANT
WP2
VPP2
BVD12
BVD11
WP1
2ICRST
ICDIR
CD1#
RDY1#
WAIT#
MCE2#
MCE22#
REG2#
CD2#
RDY2#
SA0
SA1
SA2
SA3
SA4
SA[0..12]
DRQ2
IOCHRDY
TC
AEN
D[0..15]
IOW#
IOR#
SA[0..12]
D[0..15]
EMEMW#
EMEMR#
ERESDRV
GND
OVCC3
VCCPEL3
C232
33uF TANT
L6
1.2uH
D0
D1
D2
D3
D4
D5
SA5
SA6
SA7
SA8
SA9
SA10
SA11
SA12
PGA
ElanSC300
PE
BUSY
SLCT
BVD22
BVD21
ISA24
ISA25
ACK#
INIT#
ERR#
AFDT#
STRB#
SLCTIN#
PPDWE#
VCCELSYS
VCCELMEM
GND
GND
GND
GND
C169
0.1UF
C170
0.1UF
C171
0.1UF
C172
0.1UF
VCCELSY2
GND
C173
0.1UF
GND
GND
C204
0.1UF
C205
0.1UF
VCCEL1
SIN
SOUT
MWE#
DTR#
RTS#
CTS#
DSR#
DCD#
RI#
PPOEN#
ROMCS#
DOSCS#
SDEN#
SDRDL
SDRDH
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
SDEN#
SDRDH
SDRDL
IOCS16#
MCS16#
IRQ14
BL1#
BL2#
BL3#
BL4#
SBHE#
RAS0#
RAS1#
ELCS0H#
ELCS0L#
ELCS1H#
ELCS1L#
SA[13..23]
SA[13..23]
ElanSC300 PGA Socket
D
S
M
D
2
D
S
M
D
3
D
S
M
D
4
D
S
M
D
5
D
S
M
D
6
D
S
M
D
7
SA13
SA14
SA15
SA16
SA17
SA18
SA19
SA20
SA21
SA22
SA23
D
S
M
A
0
D
S
M
A
1
D
S
M
A
2
D
S
M
A
3
D
S
M
A
4
D
S
M
A
5
D
S
M
A
6
D
S
M
A
7
D
S
M
A
8
D
S
M
A
9
D
S
M
A
1
0
D
S
M
A
1
1
D
S
M
A
1
2
D
S
M
A
1
3
D
S
M
A
1
4
D
S
M
D
0
D
S
M
D
1
GND
FRM1
LVEE#
LVDD#
CP11
CP21
DSMA[0..14]
DSMD[0..7]
LD0
LD1
LD2
LD3
M1
DSWE#
DSCE#
DSOE#
DSMD[0..7]
DSMA[0..14]
- ElanSC300 only -