AMD ElanSC310, Руководство пользователя, Страница: 102 / 124

Date: March 29, 1996 Sheet 9 of 23
Size Document Number REV
B ElanSC300/310 Evaluation Board 2.2
Title
Address Buffering & ROM Connector
AMD Proprietary/All Rights Reserved
(800) 222-9323
Austin, Texas 78741
5204 E. Ben White Blvd.
(C) Advanced Micro Devices, Inc.
If using ElanSC300 rev A, always install JP31
on pins 2 & 3.
If using ElanSC300 rev B or ElanSC310, then:
install JP31 on pins 2 & 3 to select SA12.
install JP31 on pins 1 & 2 to select A12, or
Note: (for Local Bus mode only).
33SA[12..23]
33SA12
1 2 3
JP31
*HEADER 3
MA11/SA12
LVDD#
LVDD#
ElanSC310: ’A12(BALE)’
BSA0
ElanSC300 rev B: LVDD#(A12/BALE)
ElanSC300 rev A: LVDD#(BALE)
1A1
2
1A2
4
1A3
6
1A4
8
2A1
11
2A2
13
2A3
15
2A4
17
1G
1
2G
19
1Y1
18
1Y2
16
1Y3
14
1Y4
12
2Y1
9
2Y2
7
2Y3
5
2Y4
3
VCC
20
GND
10
U12
74ACT244
R349 33
R350 33
SA0
SA[0..12]
SA[0..12]
C178
0.1UF
SA1
SA2
SA3
SA4
SA5
SA6
SA7
GND
VCCSYS5
GND
VCCSYS5
GND
1A1
2
1A2
4
1A3
6
1A4
8
2A1
11
2A2
13
2A3
15
2A4
17
1G
1
2G
19
1Y1
18
1Y2
16
1Y3
14
1Y4
12
2Y1
9
2Y2
7
2Y3
5
2Y4
3
VCC
20
GND
10
U13
74ACT244
R351 33
R352 33
R353 33
R354 33
R355 33
R356 33
R357 33
BSA1
BSA2
BSA3
BSA4
BSA5
BSA6
BSA7
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
VCCSYS5
GND
C180
0.1UF
VCCSYS5
A12 or SA12
VDA
1
VDB
24
A0
3
B0
22
A1
4
B1
21
A2
5
B2
20
A3
6
B3
19
A4
7
B4
18
A5
8
B5
17
A6
9
B6
16
A8
11
B8
14
A7
10
B7
15
GND
12
GND
13
DIR
2
G
23
U14
HD151015
24-SOIC
VCCB>=VCCA
VLA1
VLA2
VLA3
VLA4
VLA5
VLA6
VLA7
VLA8
VLA9
SVCCMEM53
VLA[1..12]
VLA[1..12]
GND
C184
0.1UF
SVCCMEM53
VDA
1
VDB
24
A0
3
B0
22
A1
4
B1
21
A2
5
B2
20
A3
6
B3
19
A4
7
B4
18
A5
8
B5
17
A6
9
B6
16
A8
11
B8
14
A7
10
B7
15
GND
12
GND
13
DIR
2
G
23
U15
HD151015
24-SOIC
VCCB>=VCCA
GND
VLA10
VLA11
VLA12
SVCCMEM53
SA10
SA11
GND
VCCSYS5
BSA8
BSA9
BSA10
BSA11
BSA12
BSA21
BSA22
BSA23
GND
R358 33
R359 33
R360 33
R361 33
R362 33
R363 33
R364 33
SA8
SA9
SA10
SA11
SA12
GND
SA21
SA22
SA23
VCCSYS5
GND
VCCSYS5
C183
0.1UF
SA[13..23]
SA[13..23]
SA13
SA14
SA15
SA16
SA17
SA18
SA19
SA20
GND
VCCSYS5
C179
0.1UF
GND
VCCSYS5
GND
1A1
2
1A2
4
1A3
6
1A4
8
2A1
11
2A2
13
2A3
15
2A4
17
1G
1
2G
19
1Y1
18
1Y2
16
1Y3
14
1Y4
12
2Y1
9
2Y2
7
2Y3
5
2Y4
3
VCC
20
GND
10
U11
74ACT244
R365 33
R366 33
R367 33
R368 33
R369 33
R370 33
R371 33
R372 33
BSA14
BSA15
BSA16
BSA17
BSA18
BSA19
BSA20
BSA13
GND
GND
C181
0.1UF
VCCSYS5
SDRDL
SDRDH
SDEN#
GND
BSDRDL
BSDRDH
BSDEN#
GND
C182
0.1UF
SVCCMEM53
Local Bus Address Translating Buffers
BSA[0..23]
BSA[0..23]
VCCSYS5 VCCSYS5
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
51 52
53 54
55 56
57 58
59 60
P12
*ROM Brd Male HDR
AMP 1-104118-4
SD[0..15]
SD[0..15]
System Address Bus Buffers
O
O
O
O
O
O
O
O
O
O
O O
O
O
O
O
O
O
O
O
O
O
E
d
g
e
o
f
B
o
a
r
d
Connector
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
SD0
SD2
SD4
SD6
SD8
SD10
SD12
SD14
BSA0
BSA2
BSA4
BSA6
SD1
SD3
SD5
SD7
SD9
SD11
SD13
SD15
BSA1
BSA3
BSA5
BSA7
BSA9
MEMW#
MCS16#
BROMCS#
BDOSCS#
GND
BSA11
BSA13
BSA15
BSA17
BSA19
BSA21
BSA23
MEMW#
BROMCS#
BDOSCS#
BSA8
BSA10
BSA12
BSA14
BSA16
BSA18
BSA20
BSA22
MEMR#
ROMVPP
GND
SBHE#
MEMR#
ROMVPP
SBHE#
O
O
O
O
O
O
O
O
O
O
O O
O
O
O
O
O
O
O
O
O
O 23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
O
O
O
O O
O
O
O 45 46
47 48
49 50
51 52
Component side
of board
O O
O
O
O
O
O O
53 54
55 56
57 58
59 60
NOTE
ROM Daughter card does full decoding
Depopulate ROMs on this board when using.
Connector (P12) is not standard on all
boards and is only populated when needed.
ROM Card Connector