ÉlanSC310 Microcontroller Evaluation Board User’s Manual
4-8
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0
Table 4-2. Typical Full ISA Memory Map
NOTE:
1. In the above configuration, MMSB is disabled, and MMSA is defined to start
at base address C0000h (i.e., ÉlanSC310 Index 6Dh=00).
2. MMSA pages 0 and 1 are disabled allowing accesses to the address range at
C0000h–C7FFFFh to propagate to the ISA bus where the VGA BIOS is located.
3. Addresses E0000h–FFFFFh are set up as linear decodes to the BIOS ROM
(Index 65h, bit 0=0, bit 1=1, bit 2=0, bit 3=0). During BIOS initialization, if
shadowing is enabled (ÉlanSC310 Index 65h bit 4=1, ÉlanSC310 Index
69h=FFh), then accesses to this address range go to DRAM.
4. Refer to the ÉlanSC310 Microcontroller Programmer’s Reference Manual for
information on ROM BIOS and ROM DOS accesses using the MMS pages.
386
Physical
Address
Memory Type Accessed
Special Notes
1FFFFFh–
100000h
DRAM.
FFFFFh–
E0000h
BIOS ROM (ROMCS).
64K BIOS image + ROM-DOS kernel.
ROMCS is set up for lin-
ear decode. May be shad-
owed to DRAM.
DFFFFh–
D0000h
Unused.
CFFFFh–
CC000h
Application ROM (DOSCS).
Used by ROM-DOS.
MMSA page 3.
CBFFFh –
C8000h
DRAM at offset C8000h–CBFFFh.
Used for SMM save state area.
MMSA page 2.
C7FFFh–
C0000h
ISA bus.
VGA card 32K BIOS ROM.
MMSA pages 0 & 1. Dis-
abled to allow accesses to
pass through to ISA bus.
BFFFFh –
A0000h
ISA bus.
VGA card display buffers.
MMSB is disabled which
allows accesses to propa-
gate to ISA bus.
9FFFFh –
00000h
DRAM.
evalbd.book : ch4 Page 8 Thursday, August 8, 1996 2:34 PM