17–6
Chapter 17: Debugging
Recommended Reset Sequence to Avoid Link Training Issues
Arria V GZ Hard IP for PCI Express
November 2012
Altera Corporation
Recommended Reset Sequence to Avoid Link Training Issues
Successful link training can only occur after the FPGA is configured and the
Transceiver Reconfiguration Controller IP Core has dynamically reconfigured
SERDES analog settings to optimize signal quality. For designs using CvP, link
training occurs after configuration of the I/O ring and Hard IP for PCI Express IP
Core.
shows the key signals that reset, control dynamic
reconfiguration, and link training. Successful reset sequence includes the following
steps:
1. Wait until the FPGA is configured as indicated by the assertion of
CONFIG_DONE
from the reconfig block controller.
2. Deassert the
mgmt_rst_reset
input to the Transceiver Reconfiguration Controller
IP Core.
3. Wait for
tx_cal_busy
and
rx_cal_busy
SERDES outputs to be deasserted.
4. Deassert
pin_perst
to take the Hard IP for PCIe out of reset. For plug-in cards, the
minimum assertion time for
pin_perst
is 100 ms. Embedded systems do not have
a minimum assertion time for
pin_perst
.
5. Wait for the
reset_status
output to be deasserted.
6. Deassert the reset output to the Application Layer.
Setting Up Simulation
Changing the simulation parameters reduces simulation time and provides greater
visibility. Depending on the variant you are simulating, the following changes may be
useful when debugging:
■
Use the PIPE Interface for Gen1 and Gen2 Variants
■
Reduce Counter Values for Serial Simulations
■
Disable the Scrambler for Gen3 Simulations
Use the PIPE Interface for Gen1 and Gen2 Variants
Running the simulation in PIPE mode reduces simulation time and provides greater
visibility. PIPE simulation is available for Gen1 and Gen2 variants in the current
release.
Complete the following steps to simulate using the PIPE interface:
1. Change to your simulation directory,
<work_dir>
/
<variant>
/testbench/
<variant>
_tb/simulation
2. Open
<variant>
_tb.v
.
3. Search for the string,
serial_sim_hwtcl
. Set the value of this parameter to 0 if it is
1.
4. Save
<variant>
_tb.v
.