Agilent Technologies 8935 Series, Руководство пользователя

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304
Ch
ap
te
r 10
B
loc
k Diag
ram
s
C
D
M
A G
en
era
to
r Se
ct
io
n
F
igur
e
10
-1
4
D
a
ta
B
u
ff
er
A
sse
m
b
ly
, A
2
A
3
4
DATA
BUFFER
128Kx8 SRAM
BUFF
DATA
BUFFER
CONTROL
SERIAL
I.O.
MODNOISE
NOISE
SOURCE
CDMA
REVERSE
LINK
MODULATOR
SERIAL
CONTROL
PARALLEL OUTPUTS
CLOCK/SYNC FROM GEN/REF BD
DATA
12
12
12
8
8
8
I NOISE CONTROL
Q NOISE CONTROL
GAUSSIAN TABLE/
BUFF/MODNOISE
CONFIG
128Kx16 FLASH
DAC
1 MHz
DAC
1 MHz
CAL
EEPROM
DAC
DAC
I SIGNAL
GAIN DELTA
Q SIGNAL CONTROL
I SIGNAL CONTROL
FROM
MEMORY/
PARALLEL
OUTPUTS
CLOCK/SYNC FROM GEN/REF BD
EMO
SERIAL BUS
STATUS/
READBACK
s_CLK
s_DATA
u_lds (L)
u_r/w (L)
uaddr 1, 15-19
8
6
udata 0-7
DATA IN
SMB
SMB
SMB
MOTHERBOARD
TO IQ MODULEATOR
I Q
SMB SMB
DIAG
INTERNAL
DIAG LINES
DIAG_OUT
DIAG
MUX
DIAG TO
MEASUREMENT
BOARD
SERIAL_DATA
SMB
SMB
BASEBAND
OUTPUT
(SIDE PANEL)
FROM
CDMA GEN/REF
I
Q
16X CHIP
SBRC
SIDE
PANEL
TO CDMA GEN/REF