Zenith Z-100 Series, Technical Manual

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Page 3.8
THEORY OF OPERATION
The keyboard encoder circuitry basically consists of a Univer-
sal Peripehral Interface (UPI) microcomputer. (See the Partial
Schematic.) It is a one-chip microcomputer that connects di-
rectly to the master processor data bus. The main features
of this device are:
• 8-bit CPU
•
8-bit data bus interface registers
• 1K by 8 bit ROM memory
•
64 by 8 bit RAM memory
Interval timer/event counter
• Tw o 8-bit TTL compatible I/O ports
• Re s i dent clock oscillator
IC's U199 and U184 are dual 2-line-to-4-line decoders that
function as I/O line expanders to increase the effective number
of output lines from the keyboard encoder. The outputs of
the line expanders are applied to the connector P105 and
then to the columns of the keyboard. (See Pictorial 3-1.) When
one of these output lines at P105 goes low, then any key
closure (of a key attached to that particular column) will be
detected as the keyboard encoder IC scans the keyboard rows
(through plug P107). The encoder then puts a code on the
data bus that corresponds to the detected key closure.
Pin 38 of U204 pulses to generate the bell and key clock
sounds. U183 NORs this line with pin 22 to generate the bell.
When U183 pin 1 goes low, it triggers the one-shot at U218B.
U218 pin 10 pulses high for about 200 ms to gate U232 pin
3, the 1-kHz oscillator, through U231 to the speaker.
To generate a key click, the negative edge of pin 38 directly
fires the one-shot at U218A pin 5. Pin 6 of this IC goes high
for about 10 ms to gate U232 through U231 to the speaker.
Note that the click line asserts whenever the bell does. How-
ever, since both circuits use the same oscillator, the click is
not heard.