MTi 1-series User Manual
Xsens MTi User Manual Repository
Datasheet
Copyright © 2021 Xsens
Page 15
Name
Type
Description
PSEL0
Selection
pins
These pins determine the signal interface. See #Peripheral interface
selection. Note that when the PSEL0/PSEL1 is not connected, its
value is 1. When PSEL0/PSEL1 is connected to GND, its value is 0.
PSEL1
nRST
Active low reset pin. Only drive with an open drain output or
momentary (tactile) switch to GND. During normal operation this pin
must be left floating, because this line is also used for internal
resets. This pin has an internal weak pull-up to VDDIO.
ADD2
Selection
pins
I
2
C address selection lines. See #List of I2C addresses.
ADD1
ADD0
Signal Interface
I2C_SDA
I
2
C
interface
I
2
C serial data input/output
I2C_SCL
I
2
C serial clock input
SPI_nCS
SPI
interface
SPI chip select input (active low)
SPI_MOSI
SPI serial data input (slave)
SPI_MISO
SPI serial data output (slave)
SPI_SCK
SPI serial clock input
RTS
UART
interface
Hardware flow control output in UART full duplex mode (Ready-to-
Send)
CTS
Hardware flow control input in UART full duplex mode (Clear-to-
Send). If flow control is not used, connect to GND
nRE
Receiver control signal output in UART half duplex mode
DE
Transmitter control signal output in UART half duplex mode
UART_RX
Receiver data input
UART_TX
Transmitter data output
SYNC_IN
Sync
interface
Accepts a trigger input to request the latest available data message
DRDY
Data
ready
Data ready output indicates that data is available (SPI / I
2
C)
