114
6
F
2
S
0
7
8
9
6.5 Function Test
6.5.1 Measuring Element
Measuring element characteristics are realized by the software, so it is possible to verify the
overall characteristics by checking representative points.
Operation of the element under test is observed by the binary output signal at monitoring jacks A
or B or by the LED indications above the jacks. In any case, the signal number corresponding to
each element output must be set on the "Logic circuit" screen of the "Test" sub-menu.
/ 2
L o g
1 /
2
T e r m
(
0 -
3 3 3 )
:
1
T e r m
(
0 -
3 3 3 )
:
8
4
i c c i r c u i t
A
B
When a signal number is entered for the TermA line, the signal is observed at monitoring jack A
and when entered for the TermB line, observed at monitoring jack B.
Note:
The voltage level at the monitoring jacks is +15V
3V for logic level "1" and less than 0.1V
for logic level "0".
CAUTION
Use the testing equipment with more than 1k
of internal impedance when observing the
output signal at the monitoring jacks.
Do not apply an external voltage to the monitoring jacks.
In case of a three-phase element, it is enough to test for a representative phase. A-phase element
is selected hereafter.
6.5.1.1 Current differential element DIF
The current differential element is checked on the following items
Operating current value
Percentage restraining characteristic
Operating time
Note:
Set all the CT ratio matching settings (kct1 to kct3) to “1” and phase angle matching settings
(d1 to d3) to “0” in the testing described in 6.5.1.1 to 6.5.1.4, because the operating value
depends on the settings.
Operating current value
Minimum operating current value is checked by simulating a one-end infeed. Figure 6.5.1 shows
a testing circuit simulating an infeed from a primary winding.
Summary of Contents for GRT100 Series
Page 142: ... 141 6 F 2 S 0 7 8 9 Appendix A Block Diagram ...
Page 144: ... 143 6 F 2 S 0 7 8 9 Appendix B Signal List ...
Page 159: ... 158 6 F 2 S 0 7 8 9 ...
Page 160: ... 159 6 F 2 S 0 7 8 9 Appendix C Variable Timer List ...
Page 162: ... 161 6 F 2 S 0 7 8 9 Appendix D Binary Output Default Setting List ...
Page 165: ... 164 6 F 2 S 0 7 8 9 ...
Page 166: ... 165 6 F 2 S 0 7 8 9 Appendix E Details of Relay Menu and LCD and Button Operation ...
Page 174: ... 173 6 F 2 S 0 7 8 9 Appendix F Case Outline Flush Mount Type Rack Mount Type ...
Page 179: ... 178 6 F 2 S 0 7 8 9 ...
Page 180: ... 179 6 F 2 S 0 7 8 9 Appendix G External Connections ...
Page 185: ... 184 6 F 2 S 0 7 8 9 ...
Page 200: ... 199 6 F 2 S 0 7 8 9 ...
Page 201: ... 200 6 F 2 S 0 7 8 9 Appendix J Return Repair Form ...
Page 205: ... 204 6 F 2 S 0 7 8 9 Customer Name Company Name Address Telephone No Facsimile No Signature ...
Page 206: ... 205 6 F 2 S 0 7 8 9 ...
Page 207: ... 206 6 F 2 S 0 7 8 9 Appendix K Technical Data ...
Page 220: ... 219 6 F 2 S 0 7 8 9 ...
Page 221: ... 220 6 F 2 S 0 7 8 9 Appendix M Symbols Used in Scheme Logic ...
Page 224: ... 223 6 F 2 S 0 7 8 9 ...
Page 225: ... 224 6 F 2 S 0 7 8 9 Appendix N Implementation of Thermal Model to IEC60255 8 ...
Page 228: ... 227 6 F 2 S 0 7 8 9 ...
Page 229: ... 228 6 F 2 S 0 7 8 9 Appendix O IEC60870 5 103 Interoperability and Troubleshooting ...
Page 241: ... 240 6 F 2 S 0 7 8 9 Appendix P Modbus Interoperability ...
Page 255: ... 254 6 F 2 S 0 7 8 9 ...
Page 256: ... 255 6 F 2 S 0 7 8 9 Appendix Q Inverse Time Characteristics ...
Page 259: ... 258 6 F 2 S 0 7 8 9 ...
Page 260: ... 259 6 F 2 S 0 7 8 9 Appendix R Failed Module Tracing and Replacement ...
Page 266: ... 265 6 F 2 S 0 7 8 9 Appendix S Ordering ...
Page 269: ... 268 6 F 2 S 0 7 8 9 3 1 Oct 2 2017 Republished under spin off company ...
Page 270: ......