TechNexion PICO-IMX6, Hardware Manual

Page: 33 / 64

PICO-IMX6 REV. A1. HARDWARE MANUAL
– VER 1.01 – JAN 28 2016
Page 33 of 64
3.6. MIPI Camera
The PICO-IMX6 provides MIPI Serial Interface camera signals.
The MIPI CSI-2 Host Controller supports the following features:

Compliant with MIPI Alliance Standard for Camera Serial Interface 2 (CSI-2), Version 1.00
– 29
November 2005

Supports up to 4 Data Lanes

Dynamically configurable multi-lane merging

Long and Short packet decoding

Timing accurate signaling of Frame and Line synchronization packets

Supports all primary and secondary data formats:

RGB, YUV and RAW color space definitions

From 24-bit down to 6-bit per pixel

Generic or user-defined byte-based data types
For additional d
etails, please refer to the “MIPI - Camera Serial Interface Host Controller (MIPI_CSI)”
chapter of the “i.MX6 Reference Manual”.
Table 11 - MIPI Camera Signal Description
PIN
CPU
BALL
CPU PAD NAME Signal V I/O Description
X2_31 F4 CSI_CLK0M CSI_CLK0M 2V5 I
MIPI Camera Serial Interface
clock pair negative signal
X2_33 F3 CSI_CLK0P CSI_CLK0P 2V5 I
MIPI Camera Serial Interface
clock pair positive signal
X2_35 E4 CSI_D0M CSI_D0M 2V5 I
MIPI Camera Serial Interface
data pair 0 negative signal
X2_37 E3 CSI_D0P CSI_D0P 2V5 I
MIPI Camera Serial Interface
data pair 0 positive signal
X2_39 D2 CSI_D1P CSI_D1P 2V5 I
MIPI Camera Serial Interface
data pair 1 positive signal
X2_41 D1 CSI_D1M CSI_D1M 2V5 I
MIPI Camera Serial Interface
data pair 1 negative signal
X2_43 E2 CSI_D2P CSI_D2P 2V5 I
MIPI Camera Serial Interface
data pair 2 positive signal
X2_45 E1 CSI_D2M CSI_D2M 2V5 I
MIPI Camera Serial Interface
data pair 2 negative signal
X2_47 F2 CSI_D3M CSI_D3M 2V5 I
MIPI Camera Serial Interface
data pair 3 negative signal
X2_49 F1 CSI_D3P CSI_D3P 2V5 I
MIPI Camera Serial Interface
data pair 3 positive signal
NOTE: MIPI Camera Serial Interface data pair 2 and data pair 3 are only available on the i.MX6 Dual and
i.MX6 Quad processor.