TechNexion PICO-IMX6, Hardware Manual

Page: 50 / 64

PICO-IMX6 REV. A1. HARDWARE MANUAL
– VER 1.01 – JAN 28 2016
Page 50 of 64
PIN
CPU
BALL
CPU PAD NAME Signal V I/O Description
E1_46 F22 EIM_D24 UART3_TXD 1V8 O
Universal Asynchronous
Receive Transmit transmit
data signal
E1_47 D24 EIM_D18 I2C3_SDA 1V8 I/O I
2
C bus data line
E1_48 M5 CSI0_DAT15 GPIO_P48 1V8 I/O
General Purpose Input
Output
E1_49 NC Not Connected
E1_50 N3 CSI0_DAT7 AUD3_RXD 1V8 I
Integrated Interchip Sound
(I
2
S) channel receive data
line
E1_51 K22 EIM_LBA SPI CS0 1V8
Serial Peripheral Interface
Chip Select 0 signal
E1_52 N1 CSI0_DAT4 AUD3_TXC 1V8 O
Integrated Interchip Sound
(I
2
S) channel word clock
signal
E1_53 K20 EIM_RW SPI CS1 1V8
Serial Peripheral Interface
Chip Select 1 signal
E1_54 N4 CSI0_DAT6 AUD3_TXFS 1V8 O
Integrated Interchip Sound
(I
2
S) channel frame
synchronization signal
E1_55 H24 EIM_CS0 CSPI2_SCLK 1V8 O
Serial Peripheral Interface
clock signal
E1_56 P2 CSI0_DAT5 AUD3_TXD 1V8 O
Integrated Interchip Sound
(I
2 S) channel transmit data
line
E1_57 J23 EIM_CS1 CSPI2_MOSI 1V8 O
Serial Peripheral Interface
master output slave input
signal
E1_58 D20 SD1_CLK SD1_CLK 1V8 I/O MMC/SDIO Clock
E1_59 J24 EIM_OE CSPI2_MISO 1V8 I
Serial Peripheral Interface
master input slave output
signal
E1_60 M21 EIM_DA9 EIM_DA9 1V8 I
SD Card detect input (Active
low)
E1_61 G22 EIM_D25 UART3_RXD 1V8 I
Universal Asynchronous
Receive Transmit receive
data signal
E1_62 B21 SD1_CMD SD1_CMD 1V8 I/O MMC/SDIO Command
E1_63 H21 EIM_D31 UART3_RTS 1V8 O
Universal Asynchronous
Receive Transmit request to
send signal
E1_64 E19 SD1_DAT2 SD1_DAT2 1V8 I/O MMC/SDIO Data bit 2
E1_65 D25 EIM_D23 UART3_CTS 1V8 O
Universal Asynchronous
Receive Transmit clear to
send signal
E1_66 A21 SD1_DAT0 SD1_DAT0 1V8 I/O MMC/SDIO Data bit 0
E1_67 NC Not Connected
E1_68 F18 SD1_DAT3 SD1_DAT3 1V8 I/O MMC/SDIO Data bit 3
E1_69 NC Not Connected
E1_70 C20 SD1_DAT1 SD1_DAT1 1V8 I/O MMC/SDIO Data bit 1