PICO-IMX6 REV. A1. HARDWARE MANUAL
– VER 1.01 – JAN 28 2016
Page
42
of
64
3.15. I
2
C Bus
The PICO-IMX6 I
2
C interfaces are implemented with the i.MX6 integrated I
2
C controller. There are two
general purpose I
2
C interfaces and one I
2
C interface dedicated towards display and system management
functions.
The following features are supported:
Compliance with Philips I
2
C specification version 2.1
Multiple-master operation
Support for standard mode (up to 100K bits/s) and fast mode (up to 400K bits/s)
Arbitration-lost interrupt with automatic mode switching from master to slave
For additional details, please refer to the “I2C Controller (I2C)” chapter of the “i.MX6 Reference Manual”.
Table 21 - I
2
C Bus Signal Description
PIN
CPU
BALL
CPU PAD NAME
Signal
V
I/O Description
X2_13
U5
KEY_COL3
I2C2_SCL
3V3
I/O I
2
C bus clock line
X2_15
T7
KEY_ROW3
I2C2_SDA
3V3
I/O I
2
C bus data line
E1_41
H20
EIM_D21
I2C1_SCL
1V8
I/O I
2
C bus clock line
E1_43
G23
EIM_D28
I2C1_SDA
1V8
I/O I
2
C bus data line
E1_45
F21
EIM_D17
I2C3_SCL
1V8
I/O I
2
C bus clock line
E1_47
D24
EIM_D18
I2C3_SDA
1V8
I/O I
2
C bus data line
NOTE: All I
2
C bus data and clock lines for all I
2
C interfaces have 2.2K
Ω pull-up resistors present on the
PICO-IMX6 module.
NOTE: It is recommended to use I2C2 signals for HDMI EDID functionality and set these pins in software
DDC mode.