Sony BVW-55, Maintenance Manual

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2-7
BVW-55
IC
[|IC|]
G
0
0
1
A
0
1
x
Y
0
1
HI-Z
0
1
x
HI-Z
: LOW LEVEL
: HIGH LEVEL
: DON’T CARE
: HIGH IMPEDANCE
16 17 18 19 20
G2
G1
G1
15
V
DD
GND
14 13 12 11
A Y = Y A
G G
7 6 5 4 3 2 1
2
4
6
8
11
13
15
17
8 9 10
18
16
14
12
9
7
5
3
1 19
G2
G
OR
2
4
6
8
18
16
14
12
1
11
13
15
17
9
7
5
3
19
G
BUS BUFFER WITH 3-STATE OUTPUTS
—TOP VIEW—
74ACT244SJ (NS)
74ACT244SJX
SN74HC244APW-E05 (TI)
SN74HCT244APW-E05 (TI)
TC74VHC244FT(EL) (TOSHIBA)
TC74VHCT244AFT(EL) (TOSHIBA)
G A Y
0 0
HI-Z
1
0
1
x
HI-Z
: LOW LEVEL
: HIGH LEVEL
: DON’T CARE
: HIGH IMPEDANCE
V
DD
GND
10 9 8
7 6 5 1 2 3 4
11 12 14 13
x 1
1 0
0
Y A
G
C-MOS BUS BUFFER GATES WITH 3-STATE OUTPUT
—TOP VIEW—
74LCX125MTCX (NS)
SN74HC125APW-E05 (TI)
TC74VHC125FT(EL) (TOSHIBA)
74LCX245MTCX (NS)
SN74HCT245APW-E05 (TI)
TC74VHC245FT(EL) (TOSHIBA)
TC74VHCT245AFT(EL) (TOSHIBA)
B1
18
A1
2
1
2
3
4
5
6
7
8
9
10
17
A2
3
B3
16
A3
4
B4
15
A4
5
B5
14
A5
6
B6
13
A6
7
B7
12
A7
8
B8
11
A8
9
19
1
G
DIR
20
19
18
17
16
15
14
13
12
11
DIR
IN
A1
A2
A3
A4
A5
A6
A7
A8
G
IN
B1
B2
B3
B4
B5
B6
B7
B8 GND
V
DD
G
0
0
1
DIR
0
1
x
OPERATION
B to A
A to B
HI-Z
0
1
x
HI-Z
: LOW LEVEL
: HIGH LEVEL
: DON’T CARE
: HIGH IMPEDANCE
B2
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
—TOP VIEW—
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
DIR
DIR
A B
DIR
G
1 19
—TOP VIEW—
C-MOS 8-BIT DUAL SUPPLY VOLTAGE TRANSLATING TRANSCEIVER
1
2
3
4
5
6
7
8
9
10
11
12
DIR
A1
A2
A3
A4
A5
A6
A7
A8
V
DD
A
GND
GND
24
23
22
21
20
19
18
17
16
15
14
13
EN
0
0
1
DIR
0
1
x
OUTPUT
B TO A
A TO B
HI-Z
V
DD
B
V
DD
B
GND
0
1
HI-Z
x
: LOW LEVEL
: HIGH LEVEL
: HIGH IMPEDANCE
: DON’T CARE
EN
B1
B2
B3
B4
B5
B6
B7
B8
3
4
5
6
7
8
9
10
DIR
2
21
20
19
18
17
16
15
14
EN
22
22
2
EN
DIR
B1
A1
21
3
B2
A2
20
4
B3
A3
19
5
B4
A4
18
6
B5
A5
17
7
B6
A6
16
8
B7
A7
15
9
B8
A8
14
10
74LVX3245QSCX (NS)
74LVX4245QSCX (NS)