Schweitzer Engineering Laboratories SEL-701-1, Instruction Manual

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SEL-701-1 Monitor
Date Code 20011009
SEL
OGIC®
Control Equations and Monitor Logic
SEL
OGIC
Control Equations
B.14
Figure B.2 Result of Falling-Edge
Operator on a Deasserting Underfrequency Element.
SEL
OGIC
Control Equation Rising-Edge Operator [/]
Use the rising-edge operator [/] with individual Relay Word bits to cause a single
processing-cycle assertion when the Relay Word bit changes state from logical 0 to
logical 1. Do not apply the [/] operator to groups of elements within parentheses.
SEL
OGIC
Control Equation Parentheses Operator [( )]
Use parentheses to logically combine multiple elements. More than one set of
parentheses [( )] can be used in a SEL
OGIC
control equation setting. Parentheses cannot
be “nested” (parentheses within parentheses) in a SEL
OGIC
control equation setting.
For example, the following SEL
OGIC
control equation setting has two sets of
parentheses:
Equation B.4
In the above example, the logic within the two sets of parentheses is processed
first and then the two results are ANDed together. The example equation could be used
to provide simple motor breaker failure protection.
SEL
OGIC
Control Equation NOT Operator [!]
Use the NOT operator [!] to invert a single Relay Word bit and also to invert the
result of multiple elements combined within parentheses.
Set SEL
OGIC
Control Equations Directly to Logical 1 or Logical 0
To define a condition always picked up or always dropped out, you can set
SEL
OGIC
control equations directly to:
1 (logical 1) or 0 (logical 0)
If you set a SEL
OGIC
control equation setting directly to 1, it is always
asserted/on/enabled. If you set a SEL
OGIC
control equation setting equal to 0, it is
always deasserted/off/disabled.
81D1T
\81D1T
one processing interval
SV4 SV4 IN2 TRIP + +
( )
50P1T 50N1T +
( ) •
=