Samsung SC32442B54, User Manual

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K5D2G13ACM-D075
Revision 1.0
December 2006
83
MCP MEMORY
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
CKE
CS
RAS
CAS
BA1
A10/AP
CL=3
ADDR
WE
: Don’t care
CLOCK
Read Interrupted by Precharge & Read Burst Stop Cycle @Full Page Burst
HIGH
RAa
CL=2
Row Active
Note:
1) At full page mode, burst is finished by burst stop or precharge.
2) About the valid DQs after burst stop, it is same as the case of Precharge interrupt.
Both cases are illustrated above timing diagram. See the label A,B on them.
But at burst write, Burst stop and Precharge interrupt should be compared carefully.
Refer the timing diagram of "Full page write burst stop cycle".
3) Burst stop is valid at every burst length.
BA0
QAa3
(A-Bank)
CAa CAb
Burst Stop
Precharge
(A-Bank)
DQ
{
QAa4
A A
QAa2 QAa3 QAa4
B
RAa
Read
(A-Bank)
Read
(A-Bank)
QAa1 QAa0 QAa2
QAa1 QAa0
QAb1 QAb0 QAb2 QAb3 QAb4 QAb5
QAb1 QAb0 QAb2 QAb3 QAb4 QAb5
B
CL=3
CL=2
DQM
{
Hi-Z
Hi-Z