MMC/SD/SDIO CONTROLLER
SC32442B RISC MICROPROCESSOR
19-8
SDI Data Control Register(SDIDatCon)
Register Address
R/W
Description
Reset
Value
SDIDatCon 0x5A00002C
R/W
SDI
Data control Register
0x0
SDIDatCon Bit
Description
Initial
Value
Reserved [31:25]
Burst4 enable
(Burst4)
[24]
Enable Burst4 mode in DMA mode. This bit should be set only
when Data Size is word.
0 = disable, 1 = Burst4 enable
0
Data Size
(DataSize)
[23:22] Indicates the size of the transfer with FIFO, which is typically byte,
halfword or word.
00 = Byte transfer, 01 = Halfword transfer
10 = Word transfer, 11 = reserved
0
SDIO Interrupt
Period Type
(PrdType)
[21]
Determines whether SDIO Interrupt period is 2 cycle or extend
more cycle when data block last is transferred (for SDIO).
0 = exactly 2 cycle, 1 = more cycle(likely single block)
0
Transmit After
Response
(TARSP)
[20]
Determines when data transmit start after response receive or not
0 = directly after DatMode set,
1 = after response receive(assume DatMode sets to 2’b11)
0
Receive After
Command
(RACMD)
[19]
Determines when data receive start after command sent or not
0 = directly after DatMode set,
1 = after command sent (assume DatMode sets to 2’b10)
0
Busy After
Command
(BACMD)
[18]
Determines when busy receive start after command sent or not
0 = directly after DatMode set,
1 = after command sent (assume DatMode sets to 2’b01)
0
Block mode
(BlkMode)
[17]
Data transfer mode
0 = stream data transfer, 1 = block data transfer
0
Wide bus enable
(WideBus)
[16]
Determines enable wide bus mode
0 = standard bus mode(only SDIDAT[0] used),
1 = wide bus mode(SDIDAT[3:0] used)
0
DMA Enable
(EnDMA)
[15] Enable
DMA
0 = disable(polling), 1 = dma enable
When DMA operation is completed, this bit should be disabled.
0
Data Transfer
Start(DTST)
[14]
Determines whether data transfer start or not. . This bit is auto-
matically cleared.
0 = data ready, 1 = data start
0
Data Transfer
Mode (DatMode)
[13:12] Determines which direction of data transfer
00 = no operation, 01 = only busy check mode
10 = data receive mode, 11 = data transmit mode
00
BlkNum [11:0]
Block
Number(0~4095), don’t care when stream mode
0x000
* If you want one of TARSP, RACMD, BACMD bits(SDIDatCon[20:18]) to “1”, you need to write on SDIDatCon
register ahead of on SDICmdCon register.(always need for SDIO)
Summary of Contents for SC32442B54
Page 1: ...SC32442B54 USER S MANUAL Revision 1 0 ...
Page 43: ...PRODUCT OVERVIEW SC32442B RISC MICROPROCESSOR 1 42 NOTES ...
Page 59: ...PROGRAMMER S MODEL SC32442B RISC MICROPROCESSOR 2 16 NOTES ...
Page 123: ...ARM INSTRUCTION SET SC32442B RISC MICROPROCESSOR 3 64 NOTES ...
Page 167: ...THUMB INSTRUCTION SET SC32442B RISC MICROPROCESSOR 4 44 NOTES ...
Page 187: ...MEMORY CONTROLLER SC32442B RISC MICROPROCESSOR 5 20 NOTES ...
Page 250: ...DMA SC32442B RISC MICROPROCESSOR 8 14 NOTES ...
Page 308: ...PWM TIMER SC32442B RISC MICROPROCESSOR 10 20 NOTES ...
Page 330: ...UART SC32442B RISC MICROPROCESSOR 11 22 NOTES ...
Page 417: ...SC32442B RISC MICROPROCESSOR LCD CONTROLLER 15 45 NOTES ...
Page 427: ...ADC AND TOUCH SCREEN INTERFACE SC32442B RISC MICROPROCESSOR 16 10 NOTES ...
Page 511: ...BUS PRIORITIES SC32442B RISC MICROPROCESSOR 24 2 NOTES ...
Page 562: ...K5D2G13ACM D075 Revision 1 0 December 2006 7 MCP MEMORY 2Gb 256Mb x8 NAND Flash Memory A Die ...
Page 599: ...K5D2G13ACM D075 Revision 1 0 December 2006 44 MCP MEMORY 512Mb 16Mb x32 Mobile SDRAM C Die ...