K5D2G13ACM-D075
Revision 1.0
December 2006
53
MCP MEMORY
1. In order to save power consumption, Mobile SDR SDRAM has PASR option.
2. Mobile SDR SDRAM supports 3 kinds of PASR in self refresh mode : Full array, 1/2 array, 1/4 array
BA1=0
- Full Array
- 1/2 Array
- 1/4 Array
Partial Self Refresh Area
1. Apply power and attempt to maintain CKE at a high state and all other inputs may be undefined.
- Apply VDD before or at the same time as VDDQ.
2. Maintain stable power, stable clock and NOP input condition for a minimum of 200us.
3. Issue precharge commands for all banks of the devices.
4. Issue 2 or more auto-refresh commands.
5. Issue a mode register set command to initialize the mode register.
6. Issue a extended mode register set command to define DS or PASR operating type of the device after normal MRS.
For operating with DS or PASR, set DS or PASR mode in EMRS setting stage.
In order to adjust another mode in the state of DS or PASR mode, additional EMRS set is required but power up sequence is not
needed again at this time. In that case, all banks have to be in idle state prior to adjusting EMRS set.
BA0=0
BA1=0
BA0=0
BA1=0
BA0=1
BA1=1
BA0=1
BA1=1
BA0=0
BA1=1
BA0=1
BA1=1
BA0=0
BA1=0
BA0=1
BA1=0
BA0=0
BA1=0
BA0=1
BA1=1
BA0=1
BA1=1
BA0=0
Partial Array Self Refresh
Temperature Compensated Self Refresh
B. POWER UP SEQUENCE
1. In order to save power consumption, Mobile SDR SDRAM includes the internal temperature sensor and control units to control the
self refresh cycle automatically according to the two temperature range ; 45
°
C and 85
°
C.
2. If the EMRS for external TCSR is issued by the controller, this EMRS code for TCSR is ignored.
Note :
1. It has +/- 5
°
C tolerance.
Temperature Range
Self Refresh Current (IDD6)
Unit
Full Array
1/2 Array
1/4 Array
45
°
C
*1
250
220
205
uA
85
°
C
500
400
350
Summary of Contents for SC32442B54
Page 1: ...SC32442B54 USER S MANUAL Revision 1 0 ...
Page 43: ...PRODUCT OVERVIEW SC32442B RISC MICROPROCESSOR 1 42 NOTES ...
Page 59: ...PROGRAMMER S MODEL SC32442B RISC MICROPROCESSOR 2 16 NOTES ...
Page 123: ...ARM INSTRUCTION SET SC32442B RISC MICROPROCESSOR 3 64 NOTES ...
Page 167: ...THUMB INSTRUCTION SET SC32442B RISC MICROPROCESSOR 4 44 NOTES ...
Page 187: ...MEMORY CONTROLLER SC32442B RISC MICROPROCESSOR 5 20 NOTES ...
Page 250: ...DMA SC32442B RISC MICROPROCESSOR 8 14 NOTES ...
Page 308: ...PWM TIMER SC32442B RISC MICROPROCESSOR 10 20 NOTES ...
Page 330: ...UART SC32442B RISC MICROPROCESSOR 11 22 NOTES ...
Page 417: ...SC32442B RISC MICROPROCESSOR LCD CONTROLLER 15 45 NOTES ...
Page 427: ...ADC AND TOUCH SCREEN INTERFACE SC32442B RISC MICROPROCESSOR 16 10 NOTES ...
Page 511: ...BUS PRIORITIES SC32442B RISC MICROPROCESSOR 24 2 NOTES ...
Page 562: ...K5D2G13ACM D075 Revision 1 0 December 2006 7 MCP MEMORY 2Gb 256Mb x8 NAND Flash Memory A Die ...
Page 599: ...K5D2G13ACM D075 Revision 1 0 December 2006 44 MCP MEMORY 512Mb 16Mb x32 Mobile SDRAM C Die ...