Samsung SC32442B54, User Manual

Page: 607 / 647

K5D2G13ACM-D075
Revision 1.0
December 2006
52
MCP MEMORY
Register Programmed with Extended MRS
Address BA1 BA0 A12 ~ A10/AP A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
Function Mode Select
RFU
*1 DS
RFU
*1 PASR
Normal MRS Mode
Test Mode CAS Latency Burst Type Burst Length
A8 A7 Type A6 A5 A4 Latency A3 Type A2 A1 A0 BT=0 BT=1
0 0 Mode Register Set 0 0 0 Reserved 0 Sequential 0 0 0 1 1
0 1 Reserved 0 0 1 1 1 Interleave 0 0 1 2 2
1 0 Reserved 0 1 0 2 Mode Select 0 1 0 4 4
1 1 Reserved 0 1 1 3 BA1 BA0 Mode 0 1 1 8 8
Write Burst Length 1 0 0 Reserved
0 0
Setting
for Nor-
mal MRS
1 0 0 Reserved Reserved
A9 Length 1 0 1 Reserved 1 0 1 Reserved Reserved
0 Burst 1 1 0 Reserved 1 1 0 Reserved Reserved
1 Single Bit 1 1 1 Reserved 1 1 1
Full Page
*3 Reserved
Register Programmed with Normal MRS
Address
BA0 ~ BA1
A12 ~ A10/AP
A9
*2
A8 A7 A6 A5 A4 A3 A2 A1 A0
Function
"0" Setting for
Normal MRS
RFU
*1
W.B.L Test Mode CAS Latency BT Burst Length
NOTES:
1. RFU(Reserved for future use) should stay "0" during MRS cycle.
2. If A9 is high during MRS cycle, "Burst Read Single Bit Write" function will be enabled.
3. Full Page Length x32 : 64Mb(256) , 128Mb (256), 256Mb (512), 512Mb (512)
Mode Select Driver Strength PASR
BA1 BA0 Mode A6 A5 Driver Strength A2 A1 A0 # of Banks
0 0 Normal MRS 0 0 Full 0 0 0 Full Array
0 1 Reserved 0 1 1/2 0 0 1 1/2 Array
1 0 EMRS 1 0 1/4 0 1 0 1/4 Array
1 1 Reserved 1 1 1/8 0 1 1 Reserved
Reserved Address 1 0 0 Reserved
A12~A10/AP A9 A8 A7 A4 A3 1 0 1 Reserved
0 0 0 0 0 0
1 1 0 Reserved
1 1 1 Reserved
A. MODE REGISTER FIELD TABLE TO PROGRAM MODES
EMRS for PASR(Partial Array Self Ref.) & DS(Driver Strength)