± 2g / 4g / 8g / 16g Tri-axis Digital
Accelerometer Technical
Reference Manual
PART NUMBER:
KX132-1211
Rev. 1.0
31-Jul-2019
36 Thornwood Dr.
–
Ithaca, NY 14850
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All Rights Reserved
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2.2
Motion Interrupt Feature Description
KX132-1211 features an advanced threshold interrupt by the internal Wake-Up and Back-to-Sleep digital engines.
These engines allow the KX132-1211 to trigger interrupts when accelerometer activity falls below a defined threshold
window (Back-to-Sleep) or exceeds a threshold window (Wake-Up event). Note that this function only generates an
interrupt and doesn’t trigger any changes to the part configuration (e.g. power mode, ODR, etc.).
Enabling / Disabling
The Wake-up and Back-to-sleep detection can be enabled/disabled using WUFE and BTSE bits in CNTL4 register and
the direction of motion detection can be set for any axis in INC2 register.
Debounce Counter
The Wake-Up and Back-to-Sleep digital engines have an internal debounce counter to qualify motion status detection.
The debounce counter function can be set using C_MODE bit in CNTL4 register. The counter can be configured to
either reset or decrement itself if accelerometer data has either fallen below or risen above the threshold for wake-up
or back-to-sleep functionality respectively. Note that each Wake-Up Function Counter (WUFC) count qualifies 1 (one)
user-defined Wake-Up Function ODR period as set by OWUF<2:0> bits in CNTL3 register. Similarly, each Back-to-
Sleep Counter (BTSC) count qualifies 1 (one) user-defined Back-to-Sleep function ODR period as set by OBTS<2:0>
bits in CNTL4 register. Equation 5 shows how to calculate the WUFC and BTSC register values for a desired Wake-Up
and Back-to-Sleep delay times.
WUFC (counts) = Wake-Up Delay Time (sec) x Wake-up Function ODR (Hz)
BTSC (counts) = Back-to-Sleep Delay Time (sec) x Back-to-Sleep Function ODR (Hz)
Equation 5:
Wake-Up and Back-to-Sleep counts
Pulse Reject Mode
The Wake-Up and Back-to-Sleep digital engines can be configured to ignore pulse-like motion using PR_MODE bit in
CNTL4 register. This mode is only available if both positive and negative motion directions are enabled for any particular
axis.
Integration with Advanced Data Path (ADP)
KX132-1211 features a user-configurable 3-stage ADP consisting of a 2
nd
order low-pass filter, 1
st
order low-pass or
high-pass filter, and RMS calculation block. Each stage of the ADP is individually configured and can be bypassed using
the corresponding register settings. The output from the Advanced Data Path can be routed to the Wake-Up / Back-to-
Sleep engines using a series of internal MUXes. Please refer to
AN109 Introduction to Advanced Data Path
Getting Started with Advanced Data Path
application notes for details.
