Rohm Kionix KX132-1211, Technical Reference Manual

Page: 8 / 73

± 2g / 4g / 8g / 16g Tri-axis Digital
Accelerometer Technical
Reference Manual
PART NUMBER:
KX132-1211
Rev. 1.0
31-Jul-2019
36 Thornwood Dr. – Ithaca, NY 14850 © 2019 Kionix – All Rights Reserved
tel: 607-257-1080 – fax:607-257-1146 893-12874-1907311402-0.17
www.kionix.com - info@kionix.com Page 8 of 73
1.4 ADP OUTPUT REGISTERS (0x02
– 0x07)
Output from the Advanced Data Path is routed to registers 0x02
– 0x07 (XADP_L – ZADP_H) when ADPE bit is set to
1 in CNTL5 register. Data is updated at the rate set by OADP<3:0> bits in ADP_CNTL1 register. However, if data is
routed via RMS block first (ADP_RMS_OSEL bit is set to 1 in ADP_CNTL2 register), the rate is also scaled down by
RMS_AVC<2:0> b
its in ADP_CNTL1 register. The output data is provided in 2’s complement data format and is
protected while reading using auto increment mode.
XADP_L
X-axis Advanced Data Path (ADP) output least significant byte.
R R R R R R R R
XHP7 XHP6 XHP5 XHP4 XHP3 XHP2 XHP1 XHP0
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
Address: 0x02
XADP_H
X-axis Advanced Data Path (ADP) output most significant byte.
R R R R R R R R
XHP15 XHP14 XHP13 XHP12 XHP11 XHP10 XHP9 XHP8
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
Address: 0x03
YADP_L
Y-axis Advanced Data Path (ADP) output least significant byte.
R R R R R R R R
YHP7 YHP6 YHP5 YHP4 YHP3 YHP2 YHP1 YHP0
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
Address: 0x04
YADP_H
Y-axis Advanced Data Path (ADP) output most significant byte.
R R R R R R R R
YHP15 YHP14 YHP13 YHP12 YHP11 YHP10 YHP9 YHP8
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
Address: 0x05