± 2g / 4g / 8g / 16g Tri-axis Digital
Accelerometer Technical
Reference Manual
PART NUMBER:
KX132-1211
Rev. 1.0
31-Jul-2019
36 Thornwood Dr.
–
Ithaca, NY 14850
© 2019 Kionix
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All Rights Reserved
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Page
32
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73
INC6
Interrupt Control 6. This register controls routing of interrupt reporting to physical interrupt pin INT2. Note that to properly
change the value of this register, the PC1 bit in CNTL1 register
must first be set to “0”.
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
FFI2
BFI2
WMI2
DRDYI2
BTSI2
TDTI2
WUFI2
TPI2
Reset Value
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
00000000
Address:
0x27
FFI2
– Free fall interrupt reported on physical interrupt pin INT2
FFI2 = 0
– disable
FFI2 = 1
– enable
BFI2
– Buffer full interrupt reported on physical interrupt pin INT2
BF2 = 0
– disable
BF2 = 1
– enable
WMI2
– Watermark interrupt reported on physical interrupt pin INT2
WMI2 = 0
– disable
WMI2 = 1
– enable
Note: WMI is a level triggered interrupt source. If the valid condition persists, and the interrupt
stays enabled, the interrupt will block any further interrupts from other sources from
triggering the INT2 pin. To let other interrupt sources through, WMI needs to be cleared
once detected.
DRDYI2
– Data ready interrupt reported on physical interrupt pin INT2
DRDYI2 = 0
– disable
DRDYI2 = 1
– enable
BTSI2
– Back to sleep interrupt reported on physical interrupt pin INT2
BTSI2 = 0
– disable
BTSI2 = 1
– enable
TDTI2
– Tap/Double Tap interrupt reported on physical interrupt pin INT2
TDTI2 = 0
– disable
TDTI2 = 1
– enable
WUFI2
– Wake-Up (motion detect) interrupt reported on physical interrupt pin INT2
WUFI2 = 0
– disable
WUFI2 = 1
– enable
TPI2
– Tilt position interrupt reported on physical interrupt pin INT2
TPI2 = 0
– disable
TPI2 = 1
– enable