R01UH0823EJ0100 Rev.1.00
Page 1565 of 1823
Jul 31, 2019
RX23W Group
44. 12-Bit A/D Converter (S12ADE)
44.2.23
A/D Compare Function Window A Comparison Condition Setting Register 1
(ADCMPLR1)
The ADCMPLR1 register sets the condition for use in comparing the values of the ADCMPDR0 and ADCMPDR1
registers with results of A/D conversion.
The ADCMPLR1 register should be set while ADCSR.ADST bit is 0.
CMPLCHA1n Bit (n = 00 to 04, 11) (Compare Window A Comparison Condition Select)
This bit sets the condition for use in comparison with the selected channel from among AN016 to AN020 and AN027 to
which compare window A conditions are applied. A condition can be set for individual comparison of each analog input.
The CMPLCHA100 bit is used for AN016 and the CMPLCHA111 bit is used for AN027.
When the result of comparison matches the set condition, the ADCMPSR1.CMPSTCHA1n flag is set to 1.
shows the comparison conditions.
Address(es): S12AD.ADCMPLR1 0008 909Ah
b15
b14
b13
b12
b11
b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
—
—
—
—
CMPLC
HA111
—
—
—
—
—
—
CMPLC
HA104
CMPLC
HA103
CMPLC
HA102
CMPLC
HA101
CMPLC
HA100
Value after reset:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
Symbol
Bit Name
Description
R/W
b0
Compare Window A
Comparison Condition Select
When the window function is disabled
(ADCMPCR.WCMPE bit = 0):
0: ADCMPDR0 register value > A/D-converted value
1: ADCMPDR0 register value < A/D-converted value
When the window function is enabled
(ADCMPCR.WCMPE bit = 1):
0: A/D-converted value < ADCMPDR0 register value or
A/D-converted value > ADCMPDR1 register value
1: ADCMPDR0 register value < A/D-converted value <
ADCMPDR1 register value
R/W
b1
R/W
b2
R/W
b3
R/W
b4
R/W
b10 to b5
—
Reserved
These bits are read as 0. The write value should be 0.
R/W
b11
Compare Window A
Comparison Condition Select
When the window function is disabled
(ADCMPCR.WCMPE bit = 0):
0: ADCMPDR0 register value > A/D-converted value
1: ADCMPDR0 register value < A/D-converted value
When the window function is enabled
(ADCMPCR.WCMPE bit = 1):
0: A/D-converted value < ADCMPDR0 register value or
A/D-converted value > ADCMPDR1 register value
1: ADCMPDR0 register value < A/D-converted value <
ADCMPDR1 register value
R/W
b15 to b12
—
Reserved
These bits are read as 0. The write value should be 0.
R/W