R01UH0092EJ0110 Rev.1.10
Page 94 of 807
Jul 31, 2012
M16C/64C Group
8. Clock Generator
PCKSTP1A (Peripheral clock stop bit) (b0)
When using f1 for the clock source for the following peripherals, set the PCKSTP1A bit to 0 (f1 provide
enabled):
Real-time clock, pulse width modulator, remote control signal receiver,
serial interface UART0 to UART2, UART5 to UART7, SI/O3, SI/O4
multi-master I
2
C-bus interface, A/D converter
To change the PCKSTP1A bit from 1 (f1 provide disabled) to 0, use following procedure:
(1) Stop the peripherals listed above that use peripheral clock f1.
(2) Set the PCKSTP1A bit to 0.
(3) Set the registers for the peripherals again.
PCKSTP11 (Timer peripheral clock stop bit) (b1)
When using f1 or the main clock for the timer A and timer B count source, set the PCKSTP11 bit to 0 (f1
provide enabled).
To change the PCKSTP11 bit from 1 (f1 provide disabled) to 0, use following procedure:
(1) Stop timer A and timer B.
(2) Set the PCKSTP11 bit to 0.
(3) Set the registers for timer A and timer B again.
PCKSTP17 (Timer clock source select bit) (b7)
Change the PCKSTP17 bit when all of the following conditions are met:
•
Both f1 and the main clock are stably supplied.
•
Both timer A and timer B are stopped.
The PCKSTP17 bit is used for supplying the main clock to timer A and timer B.
When in PLL operating mode, high-speed mode, medium-speed mode, or wait mode, the main clock
can be used for the timer A and timer B count source.
Do not use the main clock for the timer A and timer B count source in other normal operating modes
(refer to 9.3 “Clock”).
Summary of Contents for M16C Series
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