R01UH0092EJ0110 Rev.1.10
Page 804 of 807
Jul 31, 2012
M16C/64C Group
Appendix 2. Differences between M16C/64A and M16C/64C
Appendix 2. Differences between M16C/64A and M16C/64C
Appendix Table 2.1
Differences between M16C/64A and M16C/64C (Specifications)
Item
M16C/64A
M16C/64C
Enable/disable peripheral clock
provision
N/A
Available (bits PCKSTP1A and PCKSTP11
in the PCLKSTP1 register)
Timer A/timer B clock source
selection
f1 only
f1 or main clock (the PCKSTP17 bit in the
PCLKSTP1 register)
Flash memory, suspend function
N/A
Available
Electrical characteristics
—
Characteristics of voltage detector, power-on
reset circuit, and oscillator improved.
Refer to the User’s Manual: Hardware for details.
Appendix Table 2.2
Differences between M16C/64A and M16C/64C (Bus Timing)
Item
M16C/64A
M16C/64C
Timing requirement
VCC1 = VCC2 = 5 V
tsu(DB-RD)
Min. 40[ns]
Min. 50[ns]
Timing requirement
VCC1 = VCC2 = 3 V
tsu(DB-RD)
Min. 50[ns]
Min. 60[ns]
Switching characteristics
VCC1 = VCC2 = 5 V
th(WR-DB)
Minimum value
Switching characteristics
VCC1 = VCC2 = 3 V
th(WR-AD)
Minimum value
th(WR-DB)
Minimum value
Switching characteristic
th(BCLK-DB)
Min. 0[ns]
(Standard not available)
Refer to the User’s Manual: Hardware for details.
0.5
10
9
×
f
BCLK
(
)
----------------------
10
ns
[ ]
–
0.5
10
9
×
f
BCLK
(
)
----------------------
20
ns
[ ]
–
0.5
10
9
×
f
BCLK
(
)
----------------------
10
ns
[ ]
–
0.5
10
9
×
f
BCLK
(
)
----------------------
15
ns
[ ]
–
0.5
10
9
×
f
BCLK
(
)
----------------------
10
ns
[ ]
–
0.5
10
9
×
f
BCLK
(
)
----------------------
25
ns
[ ]
–
Summary of Contents for M16C Series
Page 846: ...M16C 64C Group R01UH0092EJ0110...
