R01UH0092EJ0110 Rev.1.10
Page 603 of 807
Jul 31, 2012
M16C/64C Group
26. Consumer Electronics Control (CEC) Function
Figure 26.8
Low Pulse Output in Receive Error
CEC
When the CABTWEN bit is 0:
Low pulse is immediately output regardless of the CEC signal state.
3.6 ms
3 to 4 cycles of
the count source
Receive error occurs
When the CABTWEN bit is 1:
Low pulse is output at the rising edge of the CEC signal.
3.6 ms
3 to 4 cycles of
count source
Receive error occurs
CEC
3.6 ms
Low pulse is output at the rising
edge within 3.6 ms after the receive
error occurs.
If the low level lasts for 3.6 ms
or longer after the receive error
occurs, low pulse is not output
even if the rising edge is
detected thereafter.
CEC
The above diagram applies under the following condition.
y
The CABTEN bit in the CECC4 register is 1 (low pulse output enabled in receive error).
CABTWEN: Bit in the CECC4 register
Summary of Contents for M16C Series
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