Renesas H8S/2111B, Hardware Manual

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Rev. 1.00, 05/04, page 180 of 544
9.7.4 Switching of Internal Clock and FRC Operation
When the internal clock is changed, the changeover may cause FRC to increment. This depends on
the time at which the clock is switched (bits CKS1 and CKS0 are rewritten), as shown in table 9.3.
When an internal clock is used, the FRC clock is generated on detection of the falling edge of the
internal clock scaled from the system clock (
φ
). If the clock is changed when the old source is high
and the new source is low, as in case no. 3 in table 9.3, the changeover is regarded as a falling
edge that triggers the FRC clock, and FRC is incremented. Switching between an internal clock
and external clock can also cause FRC to increment.
Table 9.3 Switching of Internal Clock and FRC Operation
No.
Timing of Switchover
by Means of CKS1
and CKS0 Bits
FRC Operation
1 Switching from
low to low
Clock before
switchover
Clock after
switchover
FRC clock
FRC
CKS bit rewrite
N N + 1
2 Switching from
low to high
Clock before
switchover
Clock after
switchover
FRC clock
FRC N N + 1 N + 2
CKS bit rewrite