Renesas H8S/2111B, Hardware Manual

Page: 276 / 582

Rev. 1.00, 05/04, page 242 of 544
Bit Bit Name
Initial
Value R/W Description
3 PER 0 R/(W) * Parity Error
[Setting condition]
•
When a parity error is detected during reception
[Clearing condition]
•
When 0 is written to PER after reading PER = 1
2 TEND 1 R Transmit End
[Setting conditions]
•
When the TE bit in SCR is 0
•
When TDRE = 1 at transmission of the last bit of a
1-byte serial transmit character
[Clearing conditions]
•
When 0 is written to TDRE after reading TDRE = 1
1 MPB 0 R Multiprocessor Bit
MPB stores the multiprocessor bit in the receive frame.
When the RE bit in SCR is cleared to 0 its previous
state is retained.
0 MPBT 0 R/W Multiprocessor Bit Transfer
MPBT stores the multiprocessor bit to be added to the
transmit frame.
Note:
*
Only 0 can be written, to clear the flag.