Rev. 1.00, 05/04, page 298 of 544
Bit Bit
Name
Initial
Value R/W Description
4 AASX 0
R/(W)
*
Second Slave Address Recognition Flag
In I
2
C bus format slave receive mode, this flag is set to
1 if the first frame following a start condition matches
bits SVAX6 to SVAX0 in SARX.
[Setting condition]
When the second slave address is detected in slave
receive mode and FSX = 0 in SARX
[Clearing conditions]
•
When 0 is written in AASX after reading AASX = 1
•
When a start condition is detected
•
In master mode
3 AL
0
R/(W)
*
Arbitration Lost Flag
Indicates that arbitration was lost in master mode.
[Setting conditions]
When ALSL = 0
•
If the internal SDA and SDA pin disagree at the
rise of SCL in master transmit mode
•
If the internal SCL line is high at the fall of SCL in
master transmit mode
When ALSL = 1
•
If the internal SDA and SDA pin disagree at the
rise of SCL in master transmit mode
•
If the SDA pin is driven low by another device
before the I
2
C bus interface drives the SDA pin
low, after the start condition instruction was
executed in master transmit mode
[Clearing conditions]
•
When ICDR is written to (transmit mode) or read
from (receive mode)
•
When 0 is written in AL after reading AL = 1
Summary of Contents for H8S/2111B
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