CHAPTER 23 LOW-VOLTAGE DETECTOR
User’s Manual U19780EJ2V0UD
578
23.4.2 When used as interrupt
(1) When detecting level of supply voltage (V
DD
)
•
When
starting
operation
<1> Mask the LVI interrupt (LVIMK = 1).
<2> Clear bit 2 (LVISEL) of the low-voltage detection register (LVIM) to 0 (detects level of supply voltage
(V
DD
)) (default value).
<3> Set the detection voltage using bits 3 to 0 (LVIS3 to LVIS0) of the low-voltage detection level selection
register (LVIS).
<4> Clear bit 1 (LVIMD) of LVIM to 0 (generates interrupt signal when the level is detected) (default value).
<5> Set bit 7 (LVION) of LVIM to 1 (enables LVI operation).
<6> Use software to wait for an operation stabilization time (10
μ
s (MIN.)).
<7> Confirm that “supply voltage (V
DD
)
≥
detection voltage (V
LVI
)” when detecting the falling edge of V
DD
, or
“supply voltage (V
DD
) < detection voltage (V
LVI
)” when detecting the rising edge of V
DD
, at bit 0 (LVIF) of
LVIM.
<8> Clear the interrupt request flag of LVI (LVIIF) to 0.
<9> Release the interrupt mask flag of LVI (LVIMK).
<10> Execute the EI instruction (when vector interrupts are used).
Figure 23-7 shows the timing of the interrupt signal generated by the low-voltage detector. The numbers in
this timing chart correspond to <1> to <9> above.
•
When stopping operation
Either of the following procedures must be executed.
•
When using 8-bit memory manipulation instruction:
Write 00H to LVIM.
•
When using 1-bit memory manipulation instruction:
Clear LVION to 0.