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CHAPTER 17 MULTIPLIER/DIVIDER
User’s Manual U19780EJ2V0UD
508
17.4.2 Division operation
•
Initial setting
1. Set operation data to multiplication/division data register A0 (MDA0L and MDA0H) and multiplication/division
data register B0 (MDB0).
2. Set bits 0 (DMUSEL0) and 7 (DMUE) of multiplier/divider control register 0 (DMUC0) to 0 and 1, respectively.
Operation will start.
•
During operation
3. The operation will be completed when 32 peripheral hardware clocks (f
PRS
) have been issued after the start of
the operation (intermediate data is stored in the MDA0L and MDA0H registers and remainder data register 0
(SDR0) during operation, and therefore the read values of these registers are not guaranteed).
•
End of operation
4. The result data is stored in the MDA0L, MDA0H, and SDR0 registers.
5. DMUE is cleared to 0 (end of operation).
6. After the operation, an interrupt request signal (INTDMU) is generated.
•
Next operation
7. To execute multiplication next, start from the initial setting in
17.4.1 Multiplication operation
.
8. To execute division next, start from the initial setting in
17.4.2 Division operation
.