CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
User’s Manual U19780EJ2V0UD
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6.6 Cautions for 16-Bit Timer/Event Counter 00
(1) Restrictions for each channel of 16-bit timer/event counter 00
Table 6-3 shows the restrictions for each channel.
Table 6-3. Restrictions for Each Channel of 16-Bit Timer/Event Counter 00
Operation Restriction
As interval timer
As square wave output
As external event counter
−
As clear & start mode entered by
TI000 pin valid edge input
Using timer output (TO00) is prohibited when detection of the valid edge of the TI010 pin is
used. (TOC00 = 00H)
As free-running timer
−
As PPG output
0000H
≤
CP010 < CR000
≤
FFFFH
As one-shot pulse output
Setting the same value to CR000 and CP010 is prohibited.
As pulse width measurement
Using timer output (TO00) is prohibited (TOC00 = 00H)
(2) Timer start errors
An error of up to one clock may occur in the time required for a match signal to be generated after timer start.
This is because counting TM00 is started asynchronously to the count pulse.
Figure 6-56. Start Timing of TM00 Count
0000H
Timer start
0001H
0002H
0003H
0004H
Count pulse
TM00 count value
(3) Setting of CR000 and CR010 (clear & start mode entered upon a match between TM00 and CR000)
Set a value other than 0000H to CR000 and CR010 (TM00 cannot count one pulse when it is used as an external
event counter).