CHAPTER 20 STANDBY FUNCTION
User’s Manual U19780EJ2V0UD
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20.1.2 Registers controlling standby function
The standby function is controlled by the following two registers.
•
Oscillation stabilization time counter status register (OSTC)
•
Oscillation stabilization time select register (OSTS)
Remark
For the registers that start, stop, or select the clock, see
CHAPTER 5 CLOCK GENERATOR
.
(1) Oscillation stabilization time counter status register (OSTC)
This is the register that indicates the count status of the X1 clock oscillation stabilization time counter. When X1
clock oscillation starts with the internal high-speed oscillation clock or subsystem clock used as the CPU clock,
the X1 clock oscillation stabilization time can be checked.
OSTC can be read by a 1-bit or 8-bit memory manipulation instruction.
When reset is released (reset by RESET input, POC, LVI, and WDT), the STOP instruction and MSTOP (bit 7 of
MOC register) = 1 clear OSTC to 00H.