TA600032-EN0/0
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4.4
Pin description
4.4.1
CLK [8]
This is an input pin for "Reference clock" signal.
Connect a 40 MHz or 80 MHz crystal oscillator.
4.4.2
CKSL [5]
This is an input pin for selecting "Reference clock selection".
CLK
CKSL
40 MHz
L
80 MHz
H
Set the level of the "CKSL" pin according to the crystal oscillator connected to the "CLK" pin.
4.4.3
RST [23]
This is an input pin for "Reset" signal.
For details, see "6.1.1 Hardware reset".
4.4.4
SPD0 [1], SPD1 [2]
These are the input pins for setting the "Transmission speed" of "Motionnet
®
" communication.
Transmission speed SPD1 SPD0
20 Mbps
H
H
10 Mbps
H
L
5 Mbps
L
H
2.5 Mbps
L
L
Set the level of "SPD0" and "SPD1" pins according to the transmission speed used.
4.4.5
SI [44], SO [41], SOEH [43]
These are the input, output, and enable pins of "Motionnet
®
" signals.
Connect to a RS-485 line-transceiver.
For details, see "4.5
4.4.6
SOEI [46]
This is an enable pin for "Motionnet
®
" signal. Normally connect to "GND".
When using multiple "Local LSIs" on the same board, connect to the "SOEH" pin of the subsequent step.
When connecting multiple "Local LSIs", limit the number of steps to four or less because output processing time of each LSI
accumulates.
For details, see "4.5
