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User’s Manual U11969EJ3V0UM00
77
CHAPTER 3 CPU FUNCTIONS
3.4.9 Specific registers
Specific registers are registers that are protected from being written with illegal data due to program runaway, etc.
The write access of these specific registers is executed in a specific sequence, and if abnormal
store operations occur, this is notified by the system status register (SYS). The V854 has two specific registers, the
clock control register (CKC) and power save control register (PSC). For details of the CKC register, refer to 6.3.3,
and for details of the PSC register, refer to 6.5.2.
The following sequence shows the data setting of the specific registers.
(1) Set the PSW NP bit to 1 (interrupt disabled).
(2) Write arbitrary 8-bit data in the command register (PRCMD).
(3) Write the set data in the specific registers (by the following instructions).
• Store instruction (ST/SST instruction)
• Bit manipulation instruction (SET1/CLR1/NOT1 instruction)
(4) Return the PSW NP bit to 0 (interrupt disable canceled).
(5) To shift to the software STOP mode or IDLE mode, insert the NOP instructions (2 or 5 instructions).
No special sequence is required when reading the specific registers.
Cautions 1. If an interrupt request is accepted between the time PRCMD is issued (2) and the specific
register write operation (3) that follows immediately after, the write operation to the specific
register is not performed and a protection error (PRERR bit of SYS register is “1”) may occur.
Therefore, set the NP bit of PSW to 1 (1) to disable the acceptance of INT/NMI.
The above also applies when a bit manipulation instruction is used to set a specific register.
Moreover, to ensure that the execution routine following release of the software STOP/IDLE
mode is performed correctly, insert the NOP instruction as a dummy instruction (5). If the
value of the ID bit of PSW does not change as the result of execution of the instruction to
return the NP bit to 0 (4), insert two NOP instructions, and if the value of the ID bit of PSW
changes, insert five NOP instructions.
A description example is given below.
[Description example] : In case of PSC register
LDSR rX,5
; NP bit = 1
ST.B r0,PRCMD [r0]
; Write to PRCMD
ST.B rD,PSC [r0]
; PSC register setting
LDSR rY,5
; NP bit = 0
NOP
; Dummy instruction (2 or 5 instructions)
.
.
.
NOP
(next instruction)
; Execution routine following cancellation of software STOP/IDLE mode
.
.
.
rX: Value to be written to PSW
rY: Value to be written back to PSW
rD: Value to be set to PSC
When saving the value of PSW, the value of PSW prior to setting the NP bit must be transferred
to the rY register.
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