Mitsubishi MELSEC iQ-F, User Manual

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APPX
Appendix 4 Buffer Memory Areas
Operation mode monitor
The operation mode status in operation can be checked.
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Buffer memory address
The following shows the buffer memory address of this area.
Input signals
A state of a multiple input module can be checked in the buffer memory area.
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Buffer memory address
The following shows the buffer memory address of this area.
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List of input signals
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Module READY (b0)
Module READY (b0) turns on to indicate the preparation for the conversion is completed after the power-on or after the reset
of the CPU module, and the conversion is performed.
In the following cases, 'Module READY' turns off.
• In the offset/gain setting mode (In this case, the conversion is performed.)
• When a watchdog timer error has occurred in the multiple input module (In this case, the conversion is not performed.)
Monitor value Description
0 Normal mode
1 Offset/gain setting mode
2 FX2N Allocation Mode
3 2CH conversion mode
Buffer memory name CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8
Operation mode monitor 60
Operation mode monitor (In FX2N allocation mode function) 60
Buffer memory name CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8
Input signals 69
Input signal (In FX2N allocation mode function) 69
Buffer Memory Areas Description
b0 Module READY
b1 to 4 Use not allowed
b5 Offset/gain initialization completed flag
b6 Disconnection detection signal
b7 Use not allowed
b8 Warning output signal
b9 Operating condition setting completed flag
b10 Offset/gain setting mode status flag
b11 Channel change completed flag
b12 Input signal error detection signal
b13 Use not allowed
b14 Conversion completed flag
b15 Error flag