iWave iW-RainboW-G17M, Hardware User'S Manual

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REL 1.0
Page 27 of 53
Cyclone V SoC Qseven SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Pin
No.
Qseven Edge
Connector
Pin Name
Signal Name
Cyclone V SoC
Ball Name/
Pin Number
Signal Type/
Termination
Description
17 WAKE# B_HPS_GPI13 HPS_GPI13/
V24 I, 3.3V CMOS External system wake event.
Note: This Pin is connected to
Cyclone V HPS GPI13 through
Voltage translator.
18 SUS_S3# HPS_GPIO28(NA
ND_WE) NAND_WE /
D15 O, 3.3V CMOS /
4.7K PU
Note: PU is
mentioned in the
assumption that
Boot Media
Switch (SW2) is
set for SD/MMC.
S3 state is not supported.
Note: This Pin is connected to
Cyclone V HPS_GPIO28 for GPIO
Purpose. Since same signal is also
used internally in SOM to select
HPS boot media, it is recommended
not to drive externally.
19 SUS_STAT# - - - NC.
20 PWRBTN# B_HPS_GPI12 HPS_GPI12/
AC27 I, 3.3V CMOS PWRBTN# is not supported.
Note: This Pin is connected to
Cyclone V HPS GPI12 through
Voltage translator.
21 SLP_BTN# - - - NC.
22 LID_BTN# - - - NC.
23 GND GND - Power Ground.
24 GND GND - Power Ground.
25 GND GND - Power Ground.
26 PWGIN SOM_PWREN NA I, 5V CMOS Active high power enable input to
SOM.
27 BATLOW# - - - NC.
28 RSTBTN# RSTBTN HPS_NRST/
A23 I, 3.3V CMOS /
10K PU Active low reset button input to
SOM.
29 S FPGA_D2_SATA
0_TXP GXB_TX_L5P/
D2 O, DIFF/
0.1uf AC coupled SATA0 transmit output differential
positive.
30 S FPGA_H2_SATA
1_TXP GXB_TX_L4P/
H2 O, DIFF/
0.1uf AC coupled SATA1 transmit output differential
positive.
31 SATA0_TX- FPGA_D1_SATA
0_TXN GXB_TX_L5N/
D1 O, DIFF/
0.1uf AC coupled SATA0 transmit output differential
negative.
32 SATA1_TX- FPGA_H1_SATA
1_TXN GXB_TX_L4N/
H1 O, DIFF/
0.1uf AC coupled SATA1 transmit output differential
negative.
33 SATA_ACT# FPGA_Y5_SATA
_ACTn FPGA IO/
Y5 O, 3.3V OC SATA command activity line.
34 GND GND - Power Ground.
35 S FPGA_F2_SATA
0_RXP GXB_RX_L5P/
F2 I, DIFF/
0.1uf AC coupled SATA0 receive input differential
positive.