REL 1.0
Page 39 of 53
Cyclone V SoC Qseven SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Table 10: Expansion Connector Pin Assignment
Pin
No
Signal Name
Cyclone V SoC
Ball Name/
Pin Number
Signal Type/
Termination
Description
1
FPGA_AH7_DFIO4A_TXB41N
FPGA IO/
AH7
O, 2.5V LVDS
Transmit output differential pair
negative.
2
FPGA_AH24_DFIO4A_TXB72N
FPGA IO/
AH24
O, 2.5V LVDS
Transmit output differential pair
negative.
3
FPGA_AG8_DFIO4A_TXB41P
FPGA IO/
AG8
O, 2.5V LVDS
Transmit output differential pair
positive.
4
FPGA_AG24_DFIO4A_TXB72P
FPGA IO/
AG24
O, 2.5V LVDS
Transmit output differential pair
positive.
5
GND
-
Power
Ground.
6
GND
-
Power
Ground.
7
FPGA_AH8_DFIO4A_TXB44N
FPGA IO/
AH8
O, 2.5V LVDS
Transmit output differential pair
negative.
8
FPGA_AH27_DFIO4A_TXB77N
FPGA IO/
AH27
O, 2.5V LVDS
Transmit output differential pair
negative.
9
FPGA_AG9_DFIO4A_TXB44P
FPGA IO/
AG9
O, 2.5V LVDS
Transmit output differential pair
positive.
10
FPGA_AG28_DFIO4A_TXB77P
FPGA IO/
AG28
O, 2.5V LVDS
Transmit output differential pair
positive.
11
GND
-
Power
Ground.
12
GND
-
Power
Ground.
13
FPGA_AH9_DFIO4A_TXB45N
FPGA IO/
AH9
O, 2.5V LVDS
Transmit output differential pair
negative.
14
FPGA_AA26_DFBRCLKOUT15B_
TXR22N
FPGA IO/
AA26
O, 2.5V LVDS
Transmit clock output differential pair
negative.
15
FPGA_AG10_DFIO4A_TXB45P
FPGA IO/
AG10
O, 2.5V LVDS
Transmit output differential pair
positive.
16
FPGA_AB26_DFBRCLKOUT05B_
TXR22P
FPGA IO/
AB26
O, 2.5V LVDS
Transmit clock output differential pair
positive.
17
GND
-
Power
Ground.
18
GND
-
Power
Ground.
19
FPGA_AH11_DFIO4A_TXB48N
FPGA IO/
AH11
O, 2.5V LVDS
Transmit output differential pair
negative.
20
FPGA_AF28_DFIO4A_TXB80N
FPGA IO/
AF28
O, 2.5V LVDS
Transmit output differential pair
negative.
21
FPGA_AG11_DFIO4A_TXB48P
FPGA IO/
AG11
O, 2.5V LVDS
Transmit output differential pair
positive.
22
FPGA_AF27_DFIO4A_TXB80P
FPGA IO/
AF27
O, 2.5V LVDS
Transmit output differential pair
positive.
23
GND
-
Power
Ground.
24
GND
-
Power
Ground.
