REL 1.0
Page 21 of 53
Cyclone V SoC Qseven SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
2.6.4
FPGA AS Header (Optional)
To program the Cyclone V FPGA Configuration Flash, Active Serial Interface can be used. Using this Active Serial (AS)
header, the external programmer serially transmits the operation commands and configuration bits to the
configuration Flash on DATA0. This is the optional feature and will not be populated in default configuration.
Figure 6: FPGA AS Connector
Number of Pins
- 10
Connector Part
- GRPB052MWCN-RC from Sullins Connector Solutions
Mating Connector
- LPPB052CFFN-RC from Sullins Connector Solutions
Table 6: FPGA AS Header Pin Assignment
Pin
No
Signal Name
Signal Type/
Termination
Description
1
FPGA_DCLK
I, 3.3V CMOS
Serial clock to configuration flash.
2
GND
Power
Ground.
3
FPGA_CONF_DONE
IO, 3.3V CMOS
Configuration status IO to Cyclone V FPGA.
4
VCC_3V3
O, 3.3V Power
Supply Voltage.
5
FPGA_nCONFIG
I, 3.3V CMOS
Configuration input to Cyclone V FPGA.
6
FPGA_nCE
I, 3.3V CMOS
Chip Enable input to Cyclone V FPGA.
7
FPGA_AS_DATA1
O, 3.3V CMOS
Serial data output from configuration flash.
8
FPGA_CSOn
I, 3.3V CMOS
Chip select input to configuration flash.
9
FPGA_AS_DATA0
I, 3.3V CMOS
Serial data input to configuration flash.
10
GND
Power
Ground.
