REL 1.0
Page 44 of 53
Cyclone V SoC Qseven SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Figure 10: Qseven SOM Power Sequence
Table 12: Power Sequence Timing
Item
Description
Value
T1
VCC_RTC rise time to VCC rise time
≥ 0 ms
T2
VCC rise time to PWGIN rise time
≥ 0 ms
T3
PWGIN fall time to VCC fall time
≥ 0 ms
T4
VCC fall time to VCC_RTC fall time
≥ 0 ms
3.1.3
Power Consumption
Table 13: Power Consumption
Task/Status
Power Rail
Current Drawn
In System Idle
VCC
TBD
In HPS Full load and FPGA LCD,PWM & GPIOs
VCC
TBD
RTC power when VCC Power OFF state
VCC_RTC
1.5uA