REL 1.0
Page 33 of 53
Cyclone V SoC Qseven SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Pin
No.
Qseven Edge
Connector
Pin Name
Signal Name
Cyclone V SoC
Ball Name/
Pin Number
Signal Type/
Termination
Description
139
DP_LANE1-/
TMDS_LANE
1-
-
-
-
NC.
140
DP_AUX-
-
-
-
NC.
141
GND
GND
-
Power
Ground.
142
GND
GND
-
Power
Ground.
143
D/
TMDS_LANE
0+
-
-
-
NC.
144
RSVD
-
-
-
NC.
145
DP_LANE2-/
TMDS_LANE
0-
-
-
-
NC.
146
RSVD
-
-
-
NC.
147
GND
GND
-
Power
Ground.
148
GND
GND
-
Power
Ground.
149
D/
TMDS_LANE
2+
-
-
-
NC.
150
HDMI_CTRL_
DAT
-
-
-
NC.
151
DP_LANE0-/
TMDS_LANE
2-
-
-
-
NC.
152
HDMI_CTRL_
CLK
-
-
-
NC.
153
DP_HDMI_H
PD#
-
-
-
NC.
154
RSVD2
-
-
-
NC.
155
PCIE_CLK_RE
F+
PCIe_CLK_REFP
NA
O, DIFF
PCIe differential reference clock
positive.
156
PCIE_WAKE# B_FPGA_AH12_
PCIe_WAKEn
FPGA IO/
AH12
I, 3.3V CMOS
PCIe interface wake up signal.
157
PCIE_CLK_RE
F-
PCIe_CLK_REFN
NA
O, DIFF
PCIe differential reference clock
negative.
158
PCIE_RST#
FPGA_AC4_PCIe
_RSTn
FPGA IO/
AC4
O, 3.3V CMOS
PCIe Reset signal.
159
GND
GND
-
Power
Ground.
160
GND
GND
-
Power
Ground.