iWave iW-RainboW-G17M, Hardware User'S Manual

Page: 29 / 53

REL 1.0
Page 29 of 53
Cyclone V SoC Qseven SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Pin
No.
Qseven Edge
Connector
Pin Name
Signal Name
Cyclone V SoC
Ball Name/
Pin Number
Signal Type/
Termination
Description
58 GND GND - Power Ground.
59 HDA_SYNC/
I2S_WS FPGA_AD4_AC9
7_I2S_SYNC FPGA IO/
AD4 O, 3.3V CMOS Audio transmit frame
synchronization line.
60 SMB_CLK/
GP1_I2C_CLK HPS_I2C1_SCL(T
RACE_D3) TRACE_D3/
K18 O, 3.3V OD/
4.7K PU I2C1 clock signal.
Note: Same signal is also connected
to Qseven edge connector 127
th
and 128
th
pins.
61 HDA_RST#/
I2S_RST# FPGA_AA4_AC9
7_I2S_RSTn FPGA IO/
AA4 O, 3.3V CMOS Audio codec reset.
62 SMB_DAT/
GP1_I2C_DA
T HPS_I2C1_SDA(
TRACE_D2) TRACE_D2/
A21 IO, 3.3V OD/
4.7K PU I2C1 data signal.
Note: Same signal is also connected
to Qseven edge connector 125
th
and 126
th
pins.
63 HDA_BITCLK/
I2S_CLK FPGA_U9_AC97
_I2S_CLK FPGA IO/
U9 O, 3.3V CMOS Audio transmit clock line.
64 SMB_ALERT# - - - NC.
65 HDA_SDI/
I2S_SDI FPGA_U10_AC9
7_I2S_SDI FPGA IO/
U10 I, 3.3V CMOS Audio transmit data line.
66 GP0_I2C_CLK HPS_I2C0_SCL(T
RACE_D7)
TRACE_D7/
C18 O, 3.3V OD/
4.7K PU I2C0 Clock signal.
Note: This same signal is shared in
On-SOM RTC controller with I2C
address as 1101000b.
67 HDA_SDO/
I2S_SDO FPGA_V10_AC9
7_I2S_SDO FPGA IO/
V10 O, 3.3V CMOS Audio Receive data line.
68 GP0_I2C_DA
T HPS_I2C0_SDA(
TRACE_D6) TRACE_D6/
A19 IO, 3.3V OD /
4.7K PU I2C0 data signal.
Note: This same signal is shared in
On-SOM RTC controller with I2C
address as 1101000b.
69 THRM# - - - NC.
70 WDTRIG# HPS_GPIO50(TR
ACE_D1) TRACE_D1/
B21 I, 3.3V CMOS Watchdog trigger signal. This is
connected to HPS GPIO50.
71 THRMTRIP# - - - NC.
72 WDOUT HPS_GPIO49(TR
ACE_D0) TRACE_D0/
A22 O, 3.3V CMOS Watchdog event indicator Output.
This is connected to HPS GPIO49.
73 GND GND - Power Ground.
74 GND GND - Power Ground.
75 USB_P7-/
USB_SSTX0- - - - NC.
76 USB_P6-/
USB_SSRX0- - - - NC.