Everest CORE - Product Manual |
Application Guide
INGENIA | 08/01/2019
57
Layer
Purpose
Mid 2
Signal tracks, GND
Mid 3
Power supplies
Mid 4
Signal tracks, GND
Bottom
Components, signal tracks, GND
Proposed Design Rules
Again, many options are plausible here, but consider this specific set of rules as the minimum required to integrate
the Everest CORE without entailing an additional handicap.
Rule
Value
Minimum clearance to Power conductors (external layers)
0.5 mm
Minimum clearance to Protective Earth (chassis)
0.5 mm
Minimum distance between Signal conductors (internal & external layers) 0.15 mm
Minimum track width (internal & external layers)
0.15 mm
Minimum component body clearance
0.2 mm
Minimum annular ring (internal & external layers)
0.15 mm
Minimum plated hole diameter
0.2 mm
Hole to hole clearance
0.3 mm
Paste mask expansion
0 mm
Solder mask expansion
0.05 mm
Minimum solder mask sliver
0.07 mm
If using µvias
For higher density designs using µvias from Top to Mid 1, it is recommended to switch the purpose of Mid 1
and Mid 2, tracing the signal tracks along Mid 1 and reserving Mid 2 to set a ground plane connected to
GND_D.
