Everest CORE - Product Manual |
Application Guide
INGENIA | 08/01/2019
42
Designator
Part Number
Manufacture
r
Package
Value / Description
C3, C6
C1005X7S1A105K050
BC
TDK
0402
Ceramic capacitor, 1 µF, 10 V, X7S
D1
PTVS5V0S1UR,115
NXP
SOD-123
W
Unidirectional diode TVS, 5 V standoff, 9.2 V
max. clamping, 400 W
D2
PTVS3V3S1UR,115
NXP
SOD-123
W
Unidirectional diode TVS, 3.3 V standoff, 8 V
max. clamping, 400 W
R1, R2
RMCF0402FT100K
Stackpole
0402
Thick film resistor, 100 k
Ω
, 1 % tolerance, 1/16
W
U1, U2
AP2553W6-7
Diodes
Incorporated
SOT-23-6
N
5.5 V self-protected load switch, adjustable
current limit
7.2.5. Communications
Motion Control Bus
Everest CORE is interfaced by means of the proprietary
Motion Control Bus
protocol. The physical layer required is
similar to SPI, working under 3.3 V levels, and requiring almost nothing other than PCB traces from the on-board
Master device to the Everest CORE.
Find out more about the Motion Control Bus in the
Summit Series Reference Manual
Schematic